A 56-nm CMOS 99-${\hbox {mm}}^{2} $ 8-Gb Multi-Level NAND Flash Memory With 10-MB/s Program Throughput
A 56-nm CMOS 99-${\hbox {mm}}^{2} $ 8-Gb Multi-Level NAND Flash Memory With 10-MB/s Program Throughput
复制标题
具有 10 MB/s 程序吞吐量的 56 nm CMOS 99-${hbox {mm}}^{2} $ 8-Gb 多层 NAND 闪存
DOI：
10.1109/jssc.2006.888299
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发表时间：
2007
影响因子：
5.4
通讯作者：
S. Ohshima
中科院分区：
文献类型：
--
作者：
Ken Takeuchi;Yasushi Kameda;Susumu Fujimura;H. Otake;K. Hosono;H. Shiga;Y. Watanabe;T. Futatsuyama;Yoshihiko Shindo;M. Kojima;Makoto Iwai;M. Shirakawa;M. Ichige;K. Hatakeyama;S. Tanaka;T. Kamei;Jia;Adi Cernea;Yan Li;M. Higashitani;G. Hemink;S. Sato;K. Oowada;Shih;Naoki Hayashida;Jun Wan;J. Lutze;S. Tsao;M. Mofidi;K. Sakurai;N. Tokiwa;Hiroko Waki;Y. Nozawa;K. Kanazawa;S. Ohshima
一个单一的3.3 V，8 Gb NAND闪存与迄今为止最小的芯片，98.8 mm 2，已成功开发。这是世界上第一个采用56纳米CMOS技术制造的集成半导体芯片。包括选择晶体管的有效单元尺寸为0.0075 mum 2/bit，这是有史以来报道的最小的。为了减小芯片尺寸，引入了一种非常有效的平面布局，包括单侧行解码器、单侧页缓冲器和单侧焊盘。结果，实现了优异的70%电池面积效率。程序的吞吐量大大提高到以前报道的两倍，与二进制存储器相当。通过将页面大小从4kB增加到8 kB，实现了有史以来最好的10 MB/s编程。此外，噪声消除电路和双VDD线方案实现了小芯片尺寸和快速编程。外部页面复制可实现93毫秒的快速块复制，有效地使用1 MB的块大小
A single 3.3-V only, 8-Gb NAND flash memory with the smallest chip to date, 98.8 mm2, has been successfully developed. This is the world's first integrated semiconductor chip fabricated with 56-nm CMOS technologies. The effective cell size including the select transistors is 0.0075 mum2 per bit, which is the smallest ever reported. To decrease the chip size, a very efficient floor plan with one-sided row decoder, one-sided page buffer, and one-sided pad is introduced. As a result, an excellent 70% cell area efficiency is realized. The program throughput is drastically improved to twice as large as previously reported and comparable to binary memories. The best ever 10-MB/s programming is realized by increasing the page size from 4kB to 8kB. In addition, noise cancellation circuits and the dual VDD-line scheme realize both a small die size and a fast programming. An external page copy achieves a fast 93-ms block copy, efficiently using a 1-MB block size