Comprehensive study of soft errors in advanced CMOS circuits with 90/130 nm technology

Comprehensive study of soft errors in advanced CMOS circuits with 90/130 nm technology
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采用 90/130 nm 技术的先进 CMOS 电路中软错误的综合研究

DOI:
10.1109/iedm.2004.1419339
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发表时间:
2004
期刊:
IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004.
影响因子:
--
通讯作者:
K. Hatanaka
K. Hatanaka
中科院分区:
--
文献类型:
--
作者:
Y. Tosaka;H. Ehara;M. Igeta;T. Uemura;H. Oka;N. Matsuoka;K. Hatanaka

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采用高能中子加速和α加速实验,对90/130 nm CMOS电路的软误差特性进行了全面研究。研究了中子和射线引起的锁存电路中的过程依赖于se。文中还讨论了ram中多位se的错误模式及其对ECC设计的影响。
Characteristics of soft errors (SEs) in 90/130 nm CMOS circuits were comprehensively investigated by high energy neutron- and alpha-accelerated tests. Process dependence on SEs in latch circuits due to neutrons and alpha-ray were investigated. Error patterns in multiple-bit SEs in SRAMs and their impacts on ECC design were also discussed.