Area and Thickness Scaling of Forming Voltage of Resistive Switching Memories
Area and Thickness Scaling of Forming Voltage of Resistive Switching Memories
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DOI：
10.1109/led.2013.2288262
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发表时间：
2014-01-01
影响因子：
4.9
通讯作者：
Chen, An
中科院分区：
文献类型：
--
作者：
Chen, An
基于概率分析，提出了阻变存储器形成电压的面积和厚度缩放的简化解析模型。实验数据验证了该模型的有效性，并能形成电压投影。采用开关电阻网络模型模拟了形成电压的统计分布，验证了解析模型的正确性。在减小器件面积时形成电压的增加对于存储器可缩放性是不期望的。局部场增强有助于降低形成电压的大小及其面积依赖性。
Based on probability analysis, this letter presents a simplified analytical model for the area and thickness scaling of forming voltage of resistive switching memories. The model is validated by experimental data and enables forming voltage projection. A switching resistor network model is employed to simulate the statistical distributions of forming voltage, which also confirms the analytical model. The increase of forming voltage at decreasing device area is undesirable for memory scalability. Local field enhancement may help to reduce both the magnitude of forming voltage and its area dependence.