Advanced on-chip test technology for RSFQ circuits
Advanced on-chip test technology for RSFQ circuits
复制标题
适用于 RSFQ 电路的先进片上测试技术
DOI：
10.1109/77.622124
复制
发表时间：
1997
影响因子：
1.8
通讯作者：
Andrey I. Ryzhikh
中科院分区：
文献类型：
--
作者：
A. Kirichenko;O. Mukhanov;Andrey I. Ryzhikh
我们开发了一种先进的片上测试系统，具有新的高速时钟生成和控制功能。为了实现高速时钟信号的产生，设计了一种基于环形约瑟夫森传输线和电感耦合触发器的宽带环形时钟信号发生器。该发生器能够产生SFQ时钟脉冲的范围从15到55 GHz的使用1 kA/cm/sup 2/ Nb制造工艺。在时钟控制方面，我们设计了基于可编程移位寄存器和计数器的两种不同类型的时钟控制器电路。使用片上测试系统，我们已经成功地测试了并行乘法器模块高达15 GHz的16%的直流偏置裕度。
We have developed an advanced version of on-chip test system with new high-speed clock generation and control. For high-speed clock generation, a novel wide-bandwidth ring generator is designed using circular Josephson transmission lines with an inductively coupled trigger. The generator is capable of producing SFQ clock pulses in the range of from 15 to 55 GHz using a 1 kA/cm/sup 2/ Nb fabrication process. For clock control, we have designed two different types of clock-controller circuits based on programmable shift-register and counter. Using the on-chip test system, we have successfully tested a parallel multiplier module up to 15 GHz with 16% dc bias margins.