Multi-Domain Negative Capacitance Effects in Metal-Ferroelectric-Insulator-Semiconductor/Metal Stacks: A Phase-field Simulation Based Study
Multi-Domain Negative Capacitance Effects in Metal-Ferroelectric-Insulator-Semiconductor/Metal Stacks: A Phase-field Simulation Based Study
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DOI：
10.1038/s41598-020-66313-1
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发表时间：
2019-11
影响因子：
4.6
通讯作者：
A. Saha;S. Gupta
中科院分区：
文献类型：
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作者：
A. Saha;S. Gupta
通过自洽求解含时的Ginzburg朗道方程、Poisson方程和半导体电荷方程，采用相场法模拟分析了金属-铁电-绝缘体-金属（Metal-FE-Insulator-Metal，MFIS）叠层中铁电畴壁感生的负电容（NC）效应。以Hf_（0.5）Zr_（0.5）O_2为铁电材料，研究了MFIS和MFIS叠层中180°铁电畴的形成及其极化反转特性。我们的分析表明，通过软畴壁位移施加电压引起的极化开关具有非滞后特性。此外，畴壁能量的变化，由于畴壁位移，表现出长程相互作用，从而导致非均匀的有效局部负介电常数的铁电体。与金属-绝缘体-金属相比，这样的效应产生平均负有效介电常数，其进一步在MPEG4堆叠中提供增强的电荷响应。此外，我们表明，畴壁诱导的负有效介电常数不是铁电材料的本征性质，因此，是依赖于它的厚度，梯度能量系数和平面内介电常数的底层绝缘体。与MFIS堆叠类似，MFIS堆叠与金属氧化物半导体（MOS）电容器相比也表现出增强的电荷/电容响应。同时，铁电体的多畴状态在下面的绝缘体和半导体层中引起非均匀电势。在低施加电压下，这种非均匀性导致电子和空穴在未掺杂半导体中共存。此外，我们还证明了当铁电层处于180°多畴态时，铁电-电介质界面的最小电势以及半导体中的最小表面电势不超过外加电压（尽管存在局部微分放大和电荷增强）.
We analyze the ferroelectric domain-wall induced negative capacitance (NC) effect in Metal-FE-Insulator-Metal (MFIM) and Metal-FE-Insulator-Semiconductor (MFIS) stacks through phase-field simulations by self-consistently solving time-dependent Ginzburg Landau equation, Poisson’s equation and semiconductor charge equations. Considering Hf0.5Zr0.5O2as the ferroelectric material, we study 180° ferroelectric domain formation in MFIM and MFIS stacks and their polarization switching characteristics. Our analysis signifies that the applied voltage-induced polarization switching via soft domain-wall displacement exhibits non-hysteretic characteristics. In addition, the change in domain-wall energy, due to domain-wall displacement, exhibits a long-range interaction and thus, leads to a non-homogeneous effective local negative permittivity in the ferroelectric. Such effects yield an average negative effective permittivity that further provides an enhanced charge response in the MFIM stack, compared to Metal-Insulator-Metal. Furthermore, we show that the domain-wall induced negative effective permittivity is not an intrinsic property of the ferroelectric material and therefore, is dependent on its thickness, the gradient energy coefficient and the in-plane permittivity of the underlying insulator. Similar to the MFIM stack, MFIS stack also exhibits an enhanced charge/capacitance response compared to Metal-Oxide-Semiconductor (MOS) capacitor. Simultaneously, the multi-domain state of the ferroelectric induces non-homogeneous potential in the underlying insulator and semiconductor layer. At low applied voltages, such non-homogeneity leads to the co-existence of electrons and holes in an undoped semiconductor. In addition, we show that with the ferroelectric layer being in the 180° multi-domain state, the minimum potential at the ferroelectric-dielectric interface and hence, the minimum surface potential in the semiconductor, does not exceed the applied voltage (in-spite of the local differential amplification and charge enhancement).