Understanding and Controlling Band Alignment at the Metal/Germanium Interface for Future Electric Devices
Understanding and Controlling Band Alignment at the Metal/Germanium Interface for Future Electric Devices
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DOI：
10.3390/electronics11152419
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发表时间：
2022-08
期刊：
影响因子：
2.9
通讯作者：
T. Nishimura
中科院分区：
文献类型：
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作者：
T. Nishimura
锗（Ge）是一种有前途的半导体，作为替代沟道材料，以提高规模化硅（Si）场效应晶体管（FET）器件的性能。基于迄今为止的广泛研究，Ge FET的栅极堆叠已经得到了很大的改进，表明Ge FET的性能在通态电流方面远远上级Si FET。然而，为了抑制由于在先进节点中的金属/Ge界面处的寄生接触电阻而导致的性能退化，在金属/Ge界面处的肖特基势垒高度（SBH）的减小是必不可少的，然而在普通金属/Ge界面处的SBH由于靠近Ge的价带边缘的强费米能级钉扎（FLP）而难以由金属的功函数控制。然而，强的FLP可以减轻由一个SiGe界面层或低自由电子密度的金属，这使得有可能降低SBH的导带边缘的Ge小于0.3 eV。FLP缓解是合理的理解，通过削弱本征金属诱导的间隙状态在金属/Ge界面，可能是一个关键的解决方案，设计规模的Ge n-FET。
Germanium (Ge) is a promising semiconductor as an alternative channel material to enhance performance in scaled silicon (Si) field-effect transistor (FET) devices. The gate stack of Ge FETs has been much improved based on extensive research thus far, demonstrating that the performance of Ge FETs is much superior to that of Si FETs in terms of the on-state current. However, to suppress the performance degradation due to parasitic contact resistance at the metal/Ge interface in advanced nodes, the reduction of the Schottky barrier height (SBH) at the metal/Ge interface is indispensable, yet the SBH at the common metal/Ge interface is difficult to control by the work function of metal due to strong Fermi level pinning (FLP) close to the valence band edge of Ge. However, the strong FLP could be alleviated by an ultrathin interface layer or a low free-electron-density metal, which makes it possible to lower the SBH for the conduction band edge of Ge to less than 0.3 eV. The FLP alleviation is reasonably understandable by weakening the intrinsic metal-induced gap states at the metal/Ge interface and might be a key solution for designing scaled Ge n-FETs.