13fJ/bit probing-resilient 250K PUF array with soft darkbit masking for 1.94% bit-error in 22nm tri-gate CMOS
13fJ/bit probing-resilient 250K PUF array with soft darkbit masking for 1.94% bit-error in 22nm tri-gate CMOS
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13fJ/位%20探测弹性%20250K%20PUF%20array%20with%20soft%20darkbit%20masking%20for%201.94%%20位错误%20in%2022nm%20tri-gate%20CMOS
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发表时间：
2014
期刊：
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通讯作者：
R. Krishnamurthy
中科院分区：
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作者：
Sudhir K. Satpathy;S. Mathew;Jiangtao Li;Patrick Koeberl;M. Anders;Himanshu Kaul;Gregory K. Chen;A. Agarwal;S. Hsu;R. Krishnamurthy
250K 探测弹性 PUF 阵列采用 22nm 三栅 CMOS 制造，测量工作频率为 2GHz，0.9V、25°C 下的总能耗为 13fJ/bit。具有集成负载调制和运行时软暗位掩码生成功能的混合 PUF 电路能够以 100% 的准确度识别不稳定的 PUF 位，无需进行多个电压/温度表征，同时还将位错误降低至 1.94%。混合 PUF 单元的瞬态行为以及平衡本地时钟路由的使用将侵入式加电探测攻击的弹性提高了 75%。
A 250K probing-resilient PUF array with measured 2GHz operation and total energy consumption of 13fJ/bit at 0.9V, 25°C is fabricated in 22nm tri-gate CMOS. Hybrid PUF circuit with integrated load modulation and run-time soft dark-bit mask generation enables identification of unstable PUF bits with 100% accuracy, eliminating the need for multiple voltage/temperature characterization while also reducing bit-error down to 1.94%. Transient behavior of the hybrid PUF cell, along with the use of balanced local clock routing improves resiliency to invasive power-up probing attacks by 75%.