Fast Huffman decoding by exploiting data level parallelism

Fast Huffman decoding by exploiting data level parallelism
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利用数据级并行性进行快速霍夫曼解码

DOI:
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发表时间:
2010
期刊:
2010 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation
影响因子:
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通讯作者:
Gert
Gert
中科院分区:
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文献类型:
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作者:
Tim Drijvers;C. A. Pinto;H. Corporaal;B. Mesman;Gert

文献摘要

被引文献

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数字视频的帧速率和分辨率都在上升。因此,将视频编码标准的压缩比推到其极限,导致更复杂和计算能力饥饿的算法。可编程解决方案通过缩短即将推出的视频产品的上市时间,来跟上不断发展的视频编码标准的步伐。然而,为了与硬连线解决方案竞争,需要在尽可能多的级别上利用并行性。在本文中,重点将放在数据级并行。霍夫曼编码被证明是非常有效的,因此通常应用于许多编码标准中。然而,由于固有的顺序性质,霍夫曼解码的并行化被认为是困难的。所提出的完全灵活和可编程的加速利用可用的数据级并行霍夫曼解码。我们的实现达到了106 MBit/s的解码速度,同时运行在250 MHz的处理器上。与我们的时序基准电压源实现相比,速度提高了24倍。
The frame rates and resolutions of digital videos are on the rising edge. Thereby, pushing the compression ratios of video coding standards to their limits, resulting in more complex and computational power hungry algorithms. Programmable solutions are gaining interest to keep up the pace of the evolving video coding standards, by reducing the time-to-market of upcoming video products. However, to compete with hardwired solutions, parallelism needs to be exploited on as many levels as possible. In this paper the focus will be on data level parallelism. Huffman coding is proven to be very efficient and therefore commonly applied in many coding standards. However, due to the inherently sequential nature, parallelization of the Huffman decoding is considered hard. The proposed fully flexible and programmable acceleration exploits available data level parallelism in Huffman decoding. Our implementation achieves a decoding speed of 106 MBit/s while running on a 250 MHz processor. This is a speed-up of 24× compared to our sequential reference implementation.