A 0.5-V Hybrid SRAM Physically Unclonable Function Using Hot Carrier Injection Burn-In for Stability Reinforcement
A 0.5-V Hybrid SRAM Physically Unclonable Function Using Hot Carrier Injection Burn-In for Stability Reinforcement
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DOI：
10.1109/jssc.2020.3035207
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发表时间：
2021-07-01
影响因子：
5.4
通讯作者：
Shinohara, Hirofumi
中科院分区：
文献类型：
--
作者：
Liu, Kunyang;Chen, Xinpeng;Shinohara, Hirofumi
本文介绍了一种基于 SRAM 的物理不可克隆功能 (PUF)，它在增强型 (EE) SRAM 模式和 CMOS SRAM 模式下采用混合模式操作，以实现高本机稳定性和低功耗。基于混合结构的数据锁存方案能够在低电源电压（VDD）下运行。此外，所提出的混合SRAM PUF与热载流子注入（HCI）老化稳定性兼容，这可以将PUF稳定性增强到接近100%，而不需要位单元冗余、可见氧化物损坏、额外的制造工艺、辅助数据存储或纠错码（ECC）电路。所提出的 PUF 采用 130 nm 标准 CMOS 制造，实验结果表明，在 0.6 V/25°C 的标称条件下，其本机误码率 (BER) 为 0.29%。工作 VDD 缩小至 0.5 V，核心能效为 2.07 fJ/b。 HCI 老化后，在 0.5 至 0.7 V 以及 -40 摄氏度至 120 摄氏度（与 C 类似）的所有 VDD/温度 (VT) 角上均未发现位错误（在每种条件下测试的 5120 位 x 500 次评估）。通过使用相当于约 21 年运行的加速老化测试来验证长期可靠性，其中增强型 PUF 即使在测试期间 0.5 V/120 摄氏度的最差 VT 角也没有显示任何位错误。推出的混合 SRAM PUF 还通过了所有适用的 NIST SP 800-22 随机性测试。它具有面积为 497 F-2 的紧凑位单元。
This article introduces an SRAM-based physically unclonable function (PUF) that employs hybrid-mode operations in the enhancement-enhancement (EE) SRAM mode and CMOS SRAM mode to achieve both high native stability and low power. A data latching scheme based on the hybrid structure enables operations under low supply voltage (VDD). Furthermore, the proposed hybrid SRAM PUF is compatible with hot carrier injection (HCI) burn-in stabilization, which can reinforce PUF stability to similar to 100% without the requirements of bitcell redundancy, visible oxide damages, additional fabrication processes, helper data storage, or error-correcting code (ECC) circuits. The proposed PUF is fabricated in 130-nm standard CMOS, and the experimental results show that it achieves 0.29% native bit error rate (BER) at the nominal condition of 0.6 V/25 degrees C. The operating VDD scales down to 0.5 V, with a core energy efficiency of 2.07 fJ/b. After HCI burn-in, no bit errors are found across all VDD/temperature (VT) corners from 0.5 to 0.7 V and from -40 degrees C to 120 similar to C (5120 bits x 500 evaluations tested at each condition). Long-term reliability is verified by using an accelerated aging test equivalent to approximately 21 years of operation, where the reinforced PUF shows no bit errors even at the worst VT corner of 0.5 V/120 degrees C during the test. The introduced hybrid SRAM PUF also passes all applicable NIST SP 800-22 randomness tests. It has a compact bitcell with an area of 497 F-2.