NMOS/SiGe Resonant Interband Tunneling Diode Static Random Access Memory
NMOS/SiGe Resonant Interband Tunneling Diode Static Random Access Memory
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NMOS/SiGe 谐振带间隧道二极管静态随机存取存储器
DOI：
10.1109/drc.2006.305175
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发表时间：
2006
期刊：
影响因子：
--
通讯作者：
S. Rommel
中科院分区：
文献类型：
--
作者：
S. Sudirgo;D. Pawlik;S. Kurinec;P. Thompson;J. Daulton;S.;R. Yu;P. R. Berger;S. Rommel
基于隧道的静态随机存取存储器（SRAM）一直被寻求作为低功耗和高速嵌入式存储器应用的可行解决方案。后藤等人[1]提出的第一种电池设计由两个串联的隧道二极管组成，一个作为驱动器，另一个作为负载，如图所示。1.这种配置允许在特定范围的电源电压（VDD）下工作。信息存储在读出节点，通过FET调制进入节点的电流可以改变读出节点。通过向读出节点注入电流，迫使单元锁存到高状态，如图1（B）所示。在写低操作期间，FET用于使单元放电，将读出节点电位拉到低状态，如图1（c）所示。在III-V材料系统中对这种类型的锁存器进行了演示，在速度和功耗方面都显示出非常有希望的性能[2]。Morimotoetal在Si中实现了系统
Tunneling-based static random access memory(SRAM)has been sought as a viable solution for a lowpower and high speed embedded memory application. The first cell design, proposed by Goto et al. [1],consists oftwotunnel diodes connected in series, oneacting as the drive andthe other as the load as showninFig. 1. This configuration allows for bistable operation at a particular range ofsupply voltages (VDD). Theinformation is stored at the sense node, whichcanbe altered by modulating current into the node via a FET.Byinjecting a current into the sense node, the cell is forced to latch to a high state as illustrated in Fig l(b).During write low operation, the FETis used to discharge the cell, pulling the sense node potential to a lowstate as depicted in Fig l(c). The demonstration ofthis type of bistable latch has been done in the Ill-Vmaterial system, showing avery promisingperformance bothin speedandpowerdissipation [2]. Morimotoetal. realizedthe systemin Si