Energy performance of FPGAs on PERFECT suite kernels

Energy performance of FPGAs on PERFECT suite kernels
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PERFECT 套件内核上 FPGA 的能源性能

DOI:
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发表时间:
2014
期刊:
IEEE Conference on High Performance Extreme Computing
影响因子:
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通讯作者:
V. Prasanna
V. Prasanna
中科院分区:
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文献类型:
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作者:
S. Kuppannagari;Ren Chen;Andrea Sanny;Shreyas G. Singapura;Geoffrey Phi C. Tran;Shijie Zhou;Yusong Hu;S. Crago;V. Prasanna

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近年来,作为指标的能源效率已获得了重要的重要性。 TAPAS项目的目标是发现和开发革命性的方法,这些方法将在嵌入式计算系统上产生节能设计。实施节能算法的一个合适的目标平台是FPGA,由于其低功耗,高性能和效率以及高度的可编程性。我们开发用于减少FPGA上的记忆和通信能量耗散的优化。我们为从完美的基准套件中选择的六个内核设计参数化架构,并应用了我们的内存和通信优化。与基线实施相比,我们的优化表明提高了3倍至110倍的能效。
Energy efficiency as a metric has gained significant importance in the recent years. The goal of the TAPAS project is to discover and develop revolutionary approaches that will generate energy-efficient designs on embedded computing systems. One suitable target platform for implementing energy-efficient algorithms is the FPGA, due to its low power consumption, high performance and efficiency, and high degree of programmability. We develop optimizations targeted at reducing memory and communication energy dissipation on FPGAs. We design parameterized architectures for six kernels selected from the PERFECT benchmark suite, applying our memory and communication optimizations. Our optimizations demonstrate 3x to 110x energy efficiency improvement compared to baseline implementations.