Image-rejection CMOS low-noise amplifier design optimization techniques
Image-rejection CMOS low-noise amplifier design optimization techniques
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DOI：
10.1109/tmtt.2004.840744
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发表时间：
2005-02
影响因子：
4.3
通讯作者：
Trung‐Kien Nguyen;Nam-Jin Oh;Choong-Yul Cha;Y. Oh;G. Ihm;Sang-Gug Lee
中科院分区：
文献类型：
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作者：
Trung‐Kien Nguyen;Nam-Jin Oh;Choong-Yul Cha;Y. Oh;G. Ihm;Sang-Gug Lee
本文回顾和分析了两种基于CMOS工艺的镜像抑制（IR）低噪声放大器（LNA）设计技术，二阶有源陷波器和三阶无源陷波器。从滤波器的品质因数和频率控制能力两个方面进行了分析和讨论。作为解决合适的片上滤波器的解决方案，本文提出了一种新的陷波滤波器拓扑结构，可以克服以前的两个报告的研究的局限性。此外，还介绍了同时满足噪声和输入匹配的低噪声放大器设计方法以及线性度优化条件。通过使用所提出的陷波滤波器和所提出的设计方法，实现了用于超外差架构的IR LNA。建议的IR LNA，设计基于0.18妈妈CMOS技术，总电流耗散为4 mA，3 V电源电压下，优化为5.25 GHz的无线局域网，中频频率为500 MHz的应用。测试结果表明，功率增益为20.5dB，噪声系数小于1.5dB，输入参考三阶交调截点为-5dBm，IR为26 dB
This paper reviews and analyzes two reported image-rejection (IR) low-noise amplifier (LNA) design techniques based on CMOS technology, i.e., the second-order active notch filer and third-order passive notch filter. The analyses and discussions are based on the quality factor of filters and the ability of the frequency control. As the solution to deal with the suitable on-chip filter, this paper proposes a new notch-filter topology that can overcome the limitations of the two previous reported studies. In addition, the LNA design method satisfying the power-cons-trained simultaneous noise and input matching, as well as the linearity optimization conditions is introduced. By using the proposed notch filter and proposed design methodology, an IR LNA used in the superheterodyne architecture is implemented. The proposed IR LNA, designed based on 0.18-mum CMOS technology with total current dissipation of 4 mA under 3-V supply voltage, is optimized for a 5.25-GHz wireless local area network with IF frequency of 500-MHz applications. The measurement results show 20.5-dB power gain, lower than 1.5-dB noise figure, -5-dBm input-referred third-order intercept point and an IR of 26 dB