Two level bulk preload branch prediction

Two level bulk preload branch prediction
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两级批量预加载分支预测

DOI:
10.1109/hpca.2013.6522308
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发表时间:
2013
期刊:
2013 IEEE 19th International Symposium on High Performance Computer Architecture (HPCA)
影响因子:
--
通讯作者:
A. Saporito
A. Saporito
中科院分区:
--
文献类型:
--
作者:
J. Bonanno;Adam Collura;Daniel Lipetz;U. Mayer;Brian R. Prasky;A. Saporito

文献摘要

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本文描述了5.5 GHz IBM Zenterprise EC12微处理器中的大容量分层分支预测。与一个较小的一个级预测指标相比,在仿真模型和ZEC12硬件上进行的性能分析证明了该层次结构的好处。提出了两个级分支预测的新结构和算法。关于在第一层检测到感知到的失误后,有关多个分支的预测信息将从第二层转移到第一个级别。第二级不会直接做出分支预测。当不太可能提高生产力时,访问第二级是有限的。第二层是系统地搜索的,该顺序可能会尽早提供点击。在模拟模型中分析的工作负载中,测量结果显示最大核心性能益处为13.8%。在ZEC12硬件上分析的两个工作负载中,实现了3.4%和5.3%的系统性能改进。
This paper describes the large capacity hierarchical branch predictor in the 5.5 GHz IBM zEnterprise EC12 microprocessor. Performance analyses in a simulation model and on zEC12 hardware demonstrate the benefit of this hierarchy compared to a smaller one level predictor. Novel structures and algorithms for two level branch prediction are presented. Prediction information about multiple branches is bulk transferred from the second level into the first upon detecting a perceived miss in the first level. The second level does not directly make branch predictions. Access to the second level is limited when it is unlikely to be productive. The second level is systematically searched in an order that is likely to provide hits as early as possible. On the workloads analyzed in the simulation model, measurements show a maximum core performance benefit of 13.8%. On the two workloads analyzed on zEC12 hardware 3.4% and 5.3% system performance improvements are achieved.