Interconnection Allocation Between Functional Units and Registers in High-Level Synthesis
Interconnection Allocation Between Functional Units and Registers in High-Level Synthesis
复制标题
高级综合中功能单元和寄存器之间的互连分配
DOI：
10.1109/tvlsi.2016.2607758
复制
发表时间：
2017
影响因子：
2.8
通讯作者：
and Takeshi Yoshimura
中科院分区：
文献类型：
--
作者：
Cong Hao;Jianmo Ni;Nan Wang;and Takeshi Yoshimura
超大规模集成电路芯片上的数据通路互连通常消耗大量的功率和面积。在本文中，我们专注于端口分配问题的二元交换运营商的互连复杂性降低。首先，港口分配问题的约束图，并提出了一种实用的方法来找到一个有效的和初始的解决方案。对于解的优化，提出了一种基于初等生成树变换的局部搜索算法。为了提高优化效率，提出了一种满足单纯形表格式的矩阵形式，从而采用单纯形法进行优化。此外，还讨论了运算主元和逐次主元对算法加速的影响。实验结果表明，在随机生成的测试用例上，基于矩阵的算法显示出最高的解的最优性，比初等变换方法快5倍。在真实的高层次综合基准上，基于矩阵的方法减少了14%的互连，而以前的贪婪算法平均减少了8%。
Data path interconnection on VLSI chips usually consumes a significant amount of both power and area. In this paper, we focus on the port assignment problem for binary commutative operators for interconnection complexity reduction. First, the port assignment problem is formulated on a constraint graph, and a practical method is proposed to find a valid and initial solution. For solution optimization, an elementary spanning-tree-transformation-based local search algorithm is proposed. To improve the efficiency of optimization, a matrix formulation, which meets the simplex tabuleau format, is proposed and thus the simplex method is adopted for optimization. Moreover, operation pivoting and successive pivoting are discussed for algorithm speedup. The experimental results show that on the randomly generated test cases, the matrix-based algorithm shows the highest solution optimality and is five times faster than the elementary transformation method. On the real high-level synthesis benchmarks, the matrix-based method reduced 14% interconnections, while the previous greedy algorithm reduced 8% on average.