Circuit reliability prediction based on deep autoencoder network

Circuit reliability prediction based on deep autoencoder network
复制标题

基于深度自编码网络的电路可靠性预测

DOI:
10.1016/j.neucom.2019.07.100
复制
发表时间:
2019
期刊:
影响因子:
6
通讯作者:
Yang Xuhua
Yang Xuhua
中科院分区:
计算机科学2区
文献类型:
--
作者:
Xiao Jie;Ma Weifeng;Lou Jungang;Jiang Jianhui;Huang Yujiao;Shi Zhanhui;Shen Qing;Yang Xuhua

文献摘要

相似文献

随着半导体特征尺寸的不断减小和集成度的不断提高,高可靠电路设计正面临着许多挑战,其中可靠性评估是电路设计中最重要的步骤之一。然而,面对目前非常大规模的集成电路,传统的基于仿真的方法在计算复杂度方面稍显不足,不适用于概念阶段的电路。为了解决这一问题,本文提出了一种基于深度自动编码器网络的电路可靠性预测新方法。首先,我们分析并提取与电路可靠性相关的主要特征。接下来,我们将特征集的特点与深度自动编码器网络的要求相结合,构建一种有效的数据收集方法。然后,我们以监督学习的方式构建了面向电路可靠性预测的深度自动编码器网络模型。在74系列电路和ISCAS85基准电路上的仿真结果表明,虽然该方法的精度略低于蒙特卡罗(MC)方法和快速概率转移矩阵(F-PTM)模型,但其时空消耗在不同电路上近似恒定,并且比MC方法快102,458,469倍,大约快4,383倍 与 F-PTM 模型相比。此外,该方法可用于在概念阶段预测电路可靠性,是一种非常有效的近似方法,可以大大降低计算功耗。
As semiconductor feature size continues to decrease and the density of integration continues to increase, highly reliable circuit design is experiencing many challenges, including reliability evaluation, which is one of the most important steps in circuit design. However, faced with the very large scale of integrated circuits at present, traditional simulation-based methods are slightly inadequate in terms of computational complexity and do not apply to the circuits at the concept stage. To solve this problem, this paper presents a new prediction method for circuit reliability based on deep auto encoder networks. Firstly, we analyze and extract the main features associated with circuit reliability. Next, we construct an efficient method for data collection by combining the characteristics of the feature set with the requirements of deep auto encoder networks. Then, we build a deep auto encoder network model oriented to circuit reliability prediction in a supervised learning manner. Simulation results on 74-series circuits and ISCAS85 benchmark circuits show that although the accuracy of the proposed method is slightly lower than that of both the Monte Carlo (MC) method and the fast probabilistic transfer matrix (F-PTM) model, its time-space consumption is approximately constant on different circuits, and it is 102,458,469 times faster than the MC method, and approximately 4,383 times faster than the F-PTM model. Furthermore, the proposed method could be used to predict circuit reliability at the conceptual stage, and it is a very efficient approximation method that could greatly reduce the power consumption of the calculation.