A Short-Channel SOI RF Power LDMOS Technology With$hboxTiSi_2$Salicide on Dual Sidewalls With Cutoff Frequency$f_T sim hbox19.3 hboxGHz$
A Short-Channel SOI RF Power LDMOS Technology With$hboxTiSi_2$Salicide on Dual Sidewalls With Cutoff Frequency$f_T sim hbox19.3 hboxGHz$
复制标题
DOI：
10.1109/led.2006.883561
复制
发表时间：
2006-10
影响因子：
4.9
通讯作者：
Rong Yang;J.F. Li;H. Qian;G. Lo;N. Balasubramanian;D. Kwong
中科院分区：
文献类型：
--
作者：
Rong Yang;J.F. Li;H. Qian;G. Lo;N. Balasubramanian;D. Kwong
提出了一种基于SiO2/Si 3 N4双侧壁TiSi 2自对准硅化物的CMOS兼容SOI RF横向扩散MOS（LDMOS）技术。双侧壁的使用产生用于限定漂移区和防止源极-栅极硅化物桥接的大的工艺裕度。该技术提高了截止频率和最大振荡频率的27%-42%和14%-22%，分别为0.5-0.25 μ m的范围内的栅极长度。对于最短的0.25 μ m的栅极长度，19.3 GHz的记录截止频率和16.3 V的高击穿电压同时实现的SOI RF LDMOS。该LDMOS技术适用于3.6 V电源0-3 GHz功率RFIC应用
In this letter, a CMOS-compatible silicon-on-insulator (SOI) RF laterally diffused MOS (LDMOS) technology is proposed based on TiSi2 salicide with SiO2/Si3N4 dual sidewalls. The use of dual sidewalls yields a large process margin for defining drift regions and preventing source-gate silicide bridging. This technology improves the cutoff frequencies and the maximum oscillation frequencies by 27%-42% and 14%-22%, respectively, for a gate length in the range of 0.5-0.25 mum. For the shortest 0.25-mum gate length, a record cutoff frequency of 19.3 GHz and a high breakdown voltage of 16.3 V are achieved simultaneously for SOI RF LDMOS. This LDMOS technology is suitable for 3.6-V-supply 0-3-GHz power RFIC applications