Reverse engineering digital circuits using functional analysis
Reverse engineering digital circuits using functional analysis
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DOI：
10.5555/2485288.2485594
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发表时间：
2013-03
期刊：
影响因子：
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通讯作者：
P. Subramanyan;Nestan Tsiskaridze;Kanika Pasricha;D. Reisman;Adriana Susnea;S. Malik
中科院分区：
文献类型：
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作者：
P. Subramanyan;Nestan Tsiskaridze;Kanika Pasricha;D. Reisman;Adriana Susnea;S. Malik
集成电路（IC）现在是在全球化的多供应商环境中设计和制造的，这使得它们容易受到恶意设计更改、硬件特洛伊木马/恶意软件插入和知识产权（IP）盗窃的影响。数字电路的逆向工程可以通过使分析人员能够检测恶意硬件，验证IC的完整性并检测IP违规来减轻这些担忧。在本文中，我们提出了一套算法的逆向工程的数字电路从一个非结构化的网表，并导致在一个高层次的网表与组件，如寄存器文件，计数器，加法器和减法器。我们的技术不需要人工干预和实验表明，他们确定的功能超过51%，高达93%的门在每个实际的测试电路，我们检查。
Integrated circuits (ICs) are now designed and fabricated in a globalized multi-vendor environment making them vulnerable to malicious design changes, the insertion of hardware trojans/malware and intellectual property (IP) theft. Algorithmic reverse engineering of digital circuits can mitigate these concerns by enabling analysts to detect malicious hardware, verify the integrity of ICs and detect IP violations. In this paper, we present a set of algorithms for the reverse engineering of digital circuits starting from an unstructured netlist and resulting in a high-level netlist with components such as register files, counters, adders and subtracters. Our techniques require no manual intervention and experiments show that they determine the functionality of more than 51% and up to 93% of the gates in each of the practical test circuits that we examine.