Shear Piezoresistance in MOSFET Devices Under General Operating Conditions
Shear Piezoresistance in MOSFET Devices Under General Operating Conditions
复制标题
一般工作条件下 MOSFET 器件的剪切压阻
DOI:
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发表时间:
2011
影响因子:
3.1
通讯作者:
O. Paul
中科院分区:
文献类型:
--
作者:
B. Sbierski;P. Gieschke;O. Paul
This paper describes the modeling and characterization of in-plane stress sensors based on the shear piezoresistance effect in field-effect-transistor (FET) inversion layers. FET test structures fabricated in a commercial 0.6-μm complementary MOS technology were subjected to in-plane shear and normal stresses. A complete set of inversion layer piezoresistive coefficients was extracted for gate, bulk, and inversion carrier potentials covering the entire operating range. Stress sensitivities of the pseudo-Hall voltage of rectangular 100-μm-long 3-μm-wide n- and p-MOSFETs with multiple lateral channel contact pairs were determined. The experimental values are compared to predictions from an analytical model treating the stress as a perturbation of the unstressed device. Strongly enhanced sensitivities associated with the large potential drop close to the pinch-off point are observed in saturation for lateral contact pairs near the drain. The inaccuracy of the model for sensor operation at |VG| = 5 V is better than 14% for n-type devices and 5% for p-type devices for lateral channel contact pairs distant from source and drain by more than 12.5 μm. For contact pairs 1 μm from the drain, due to degradation effects, the inaccuracies increase to 70% and 52% for n- and p-type devices, respectively.