Dynamic coalescing for 16-bit instructions
Dynamic coalescing for 16-bit instructions
复制标题
16 位指令的动态合并
DOI：
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发表时间：
2005
期刊：
影响因子：
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通讯作者：
Rajiv Gupta
中科院分区：
文献类型：
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作者：
A. Krishnaswamy;Rajiv Gupta
在嵌入式域中，记忆使用和能源消耗是关键的约束。安装的处理器（例如ARM和MIPS）提供了16位指令集（在ARM的处理器家族中称为拇指），此外32--位指令设置以解决这些问题。使用16位指令，可以以绩效为代价实现代码尺寸的减少和指令缓存能量。本文提出了一种新颖的方法，可增强16位拇指代码的性能。我们已经观察到，在整个拇指代码中，存在等同于单臂指令的拇指指令对。我们已经开发了处理器微体系结构和拇指指令设置的增强功能，以利用此属性。我们通过合并扩展（AX）来增强拇指指令集。可以组合成单臂指令的拇指指令对被编译器替换为Axthumb指令对。轴指令与拇指指令后立即结合在一起，以在解码时产生单臂指令。增强的微体系结构可确保合并不会引入管道延迟或增加周期时间，从而导致指导计数和周期计数的减少。使用AX指令和合并硬件，我们还能够在16位模式下支持有效的预测执行。
In the embedded domain, memory usage and energy consumption are critical constraints.Embedded processors such as the ARM and MIPS provide a 16-bit instruction set, (called Thumb in the case of the ARM family of processors), in addition to the 32-bit instruction set to address these concerns. Using 16-bit instructions one can achieve code size reduction and instruction cache energy savings at the cost of performance. This paper presents a novel approach that enhances the performance of 16-bit Thumb code. We have observed that throughout Thumb code there exist Thumb instruction pairs that are equivalent to a single ARM instruction. We have developed enhancements to the processor microarchitecture and the Thumb instruction set to exploit this property. We enhance the Thumb instruction set by incorporating Augmenting eXtensions (AX). A Thumb instruction pair that can be combined into a single ARM instruction is replaced by an AXThumb instruction pair by the compiler. The AX instruction is coalesced with the immediately following Thumb instruction to generate a single ARM instruction at decode time. The enhanced microarchitecture ensures that coalescing does not introduce pipeline delays or increase cycle time thereby resulting in reduction of both instruction counts and cycle counts. Using AX instructions and coalescing hardware we are also able to support efficient predicated execution in 16-bit mode.