Energy and fan-in of logic circuits computing symmetric Boolean functions
Energy and fan-in of logic circuits computing symmetric Boolean functions
复制标题
计算对称布尔函数的逻辑电路的能量和扇入
DOI:
10.1016/j.tcs.2012.11.039
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发表时间:
2013
期刊:
影响因子:
--
通讯作者:
Kei Uchizawa and Xiao Zhou
中科院分区:
文献类型:
--
作者:
Akira Suzuki;Kei Uchizawa and Xiao Zhou
In this paper, we consider a logic circuit (ie, a combinatorial circuit consisting of gates, each of which computes a Boolean function) C computing a symmetric Boolean function f, and investigate a relationship between two complexity measures, energy e and fan-in l of C, where the energy e is the maximum number of gates outputting “1” over all inputs to C, and the fan-in l is the maximum number of inputs of every gate in C. We first prove that any symmetric Boolean function f of n variables can be computed by a logic circuit of energy e= O (n/l) and fan-in l, and then provide an almost tight lower bound e≥⌈(n− m f)/l⌉ where m f is the maximum numbers of consecutive “0” s or “1” s in the value vector of f. Our results imply that there exists a tradeoff between the energy and fan-in of logic circuits computing a symmetric Boolean function.