Code Generation Schema For Modulo Scheduled Loops

Code Generation Schema For Modulo Scheduled Loops
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模预定循环的代码生成架构

DOI:
10.1109/micro.1992.697012
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发表时间:
1992
期刊:
[1992] Proceedings the 25th Annual International Symposium on Microarchitecture MICRO 25
影响因子:
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通讯作者:
P. Tirumalai
P. Tirumalai
中科院分区:
--
文献类型:
--
作者:
B. R. Rau;M. Schlansker;P. Tirumalai

文献摘要

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软件流水线是一种重要的指令调度技术,用于有效地重叠循环的连续迭代并并行执行它们。模调度是生成这种调度的一种方法。到目前为止,Naner解决了一个几乎没有引起注意的问题,但它的复杂性并不是微不足道的:一旦生成了模调度,就考虑到循环的性质和将使用的寄存器分配策略,生成正确的高性能代码的任务。在具有和不具有专门针对支持模调度的硬件特征的情况下都研究了该问题。
Software pipelining is an important instruction scheduling technique for efficiently overlapping successive iterations of loops and executing them in parallel. Modulo scheduling is one approach for generating such schedules. This naner addresses an issue which has received little attentibn’ thus far, but which is non-trivial in its complexity: the task of generating correct, high-performance code once the modulo schedule has been generated, taking into account the nature of the loop and the register allocation strategy that will be used. This issue is studied both with and without hardware features that are specifically aimed at supporting modulo scheduling.