Towards Energy-Efficient Heterogeneous Multicore Architectures for Edge Computing
Towards Energy-Efficient Heterogeneous Multicore Architectures for Edge Computing
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DOI：
10.1109/access.2019.2910932
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发表时间：
2019-01-01
期刊：
影响因子：
3.9
通讯作者：
Chapman, Michael
中科院分区：
文献类型：
--
作者：
Gamatie, Abdoulaye;Devic, Guillaume;Chapman, Michael
近年来，边缘计算范式在物联网领域引起了广泛关注。它旨在将计算应用程序、数据和服务的前沿从通常集中的云服务器推向网络边界。这种模式转变的好处包括更好的反应性和可靠性，降低了向集中式云服务器传输数据的成本，并增强了机密性。节能边缘计算节点的设计需要微处理器等低功耗核心。异构架构是解决现代系统中关键能效需求的关键解决方案。它们联合收割机结合了各种处理器，提供了有吸引力的功率和性能权衡。不幸的是，没有标准的基于异构微处理器的架构存在于边缘计算。本文通过探索边缘计算的典型低功耗架构来解决上述问题。在FPGA上开发并原型化了各种异构多核设计，以进行无偏评估。这些设计依赖于Cortus SA商业化的具有成本效益的固有超低功耗内核，Cortus SA是嵌入式超低功耗微控制器领域的世界领先半导体IP公司。一些微架构级设计考虑因素，例如，浮点和乱序计算能力被考虑用于探索候选解决方案。此外，一个量身定制的和灵活的多任务编程模型被定义为建议的架构范例。我们分析了各种应用程序的行为可用的核心配置。这为匹配程序特性的最佳架构设置提供了有价值的见解，从而提高了能源效率。我们在多基准程序上的实验表明，与参考系统设计相比，平均可以实现22%的能量增益（高达45%），即，一个具有相同执行架构的系统，但不知道从这项工作中进行的综合评估中获得的任务管理见解。
In recent years, the edge computing paradigm has been attracting much attention in the Internet-of-Things domain. It aims to push the frontier of computing applications, data, and services away from the usually centralized cloud servers to the boundary of the network. The benefits of this paradigm shift include better reactivity and reliability, reduced data transfer costs toward the centralized cloud servers, and enhanced confidentiality. The design of energy-efficient edge compute nodes requires, among others, low power cores such as microprocessors. Heterogeneous architectures are key solutions to address the crucial energy-efficiency demand in modern systems. They combine various processors providing attractive power and performance trade-offs. Unfortunately, no standard heterogeneous microcontroller-based architecture exists for edge computing. This paper deals with the aforementioned issue by exploring typical low power architectures for edge computing. Various heterogeneous multicore designs are developed and prototyped on FPGA for unbiased evaluation. These designs rely on cost-effective and inherently ultra-low power cores commercialized by Cortus SA, a world-leading semiconductor IP company in the embedded ultra-low power microcontroller domain. Some microarchitecture-level design considerations, e.g.,floating point and out-of-order computing capabilities, are taken into account for exploring candidate solutions. In addition, a tailored and flexible multi-task programming model is defined for the proposed architecture paradigm. We analyze the behavior of various application programs on available core configurations. This provides valuable insights on the best architecture setups that match program characteristics, so as to enable increased energy-efficiency. Our experiments on multi-benchmark programs show that on average 22% energy gain can be achieved (up to 45%) compared to a reference system design, i.e., a system with the same execution architecture, but agnostic of the task management insights gained from the comprehensive evaluation carried out in this work.