Evolved Binary Neural Networks Through Harnessing FPGA Capabilities

Evolved Binary Neural Networks Through Harnessing FPGA Capabilities
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通过利用 FPGA 功能进化二元神经网络

DOI:
10.1109/icfpt47387.2019.00076
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发表时间:
2019
期刊:
International Conference on Field-Programmable Technology
影响因子:
--
通讯作者:
O. Sinnen
O. Sinnen
中科院分区:
--
文献类型:
--
作者:
Raul Valencia;Chiu;O. Sinnen

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半导体技术融合的指数进步使深度学习的扩散成为了一个重要的研究领域,在该领域中,神经网络已将其策划的其有效性解决了解决非常困难的多维问题。本文尤其关注一个二进制神经网络(BNN),该网络(BNN)在其连接和逻辑功能中使用固定长度的位来执行激发操作。利用这些特征,集成现场可编程的门阵列(FPGA)的硬件加速器已被采用以加快对深度学习网络的推断,鉴于其能够最大程度地提高并行性和能源效率。这项工作将展示算法二进制频谱多样性统一的神经进化体系结构(Bisuna)如何在不需要梯度下降的情况下对FPGA进行培训和推断。源代码可以在github.com/rval735/bisunaocl中找到
The exponential progress of semiconductor tech-nologies has enabled the proliferation of deep learning as a prominent area of research, where neural networks have demon-strated its effectiveness to solve very hard multi dimensional problems. This paper focuses on one in particular, Binary Neural Networks (BNN), which use fixed length bits in its connections and logic functions to perform excitation operations. Exploiting those characteristics, hardware accelerators that integrate field-programmable gate arrays (FPGAs) have been adopted to hasten inference of deep learning networks, given its proficiency to maximize parallelism and energy efficiency. This work will show how the algorithm Binary Spectrum-diverse Unified Neuroevolution Architecture (BiSUNA) can perform training and inference on FPGA without the need of gradient descent. Source code can be found in github.com/rval735/bisunaocl