Chameleon ART: a non-optimization based analog design migration framework
Chameleon ART: a non-optimization based analog design migration framework
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DOI：
10.1145/1146909.1147134
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发表时间：
2006-07
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影响因子：
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通讯作者：
S. Hammouda;H. Said;M. Dessouky;M. Tawfik;Quang Nguyen;Wael Badawy;H. Abbas;H. Shahein
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文献类型：
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作者：
S. Hammouda;H. Said;M. Dessouky;M. Tawfik;Quang Nguyen;Wael Badawy;H. Abbas;H. Shahein
本文介绍了一种工具，它可以自动将模拟设计从一种工艺迁移到另一种工艺，同时保持电路和版图拓扑。网表迁移引擎重新计算目标技术中的新器件尺寸，随后布局迁移引擎根据新的工艺设计规则压缩设计。整个框架保留了嵌入在原始IP中的设计智能，如对称性、层次性、布局和布线。电路迁移引擎速度非常快，可以在几分钟内重定大模拟块的目标，同时提供与原始设计相同或更好的性能。给出了3种不同电路的迁移实例，验证了整体方法的有效性。这些电路已经制作完成并进行了测试
Presented in this paper is a tool that automatically migrates analog designs from one process to another while keeping circuit and layout topologies. A netlist migration engine recalculates the new device dimensions in the target technology followed by a layout migration engine that compacts the design according to the new process design rules. The overall framework preserves design intelligence embedded in the original IP such as symmetry, hierarchy, placement and routing. The circuit migration engine, being very fast, can retarget large analog blocks in only a few minutes while giving same or better performance of the original design. The migration of 3 different circuits is presented to validate the overall methodology. These circuits have been fabricated and measured