Performance Evaluations of Four MAF-Based PLL Algorithms for Grid-Synchronization of Three-Phase Grid-Connected PWM Inverters and DGs
Performance Evaluations of Four MAF-Based PLL Algorithms for Grid-Synchronization of Three-Phase Grid-Connected PWM Inverters and DGs
复制标题
DOI：
10.6113/jpe.2016.16.5.1904
复制
发表时间：
2016-09
影响因子：
1.4
通讯作者：
Yang Han;Luo Mingyu;Changqing Chen;Aiting Jiang;Xin Zhao;J. Guerrero
中科院分区：
文献类型：
--
作者：
Yang Han;Luo Mingyu;Changqing Chen;Aiting Jiang;Xin Zhao;J. Guerrero
滑动平均滤波器（MAF）被广泛用于提高锁相环（PLL）的抗干扰能力。这对电力电子变换器的并网和稳定运行具有重要意义。然而，在PLL结构中加入MAF后，开环带宽急剧减小，这使得动态响应缓慢。为了克服这个缺点，最近提出了一些新的技术来改善基于MAF的PLL的瞬态响应。在本文中，一个全面的性能比较先进的MAF为基础的锁相环算法。此比较包括HPLL、MPLC-PLL、QT 1-PLL和DMAF-PLL。各种干扰，如电网电压骤降，电压闪变，谐波失真，相角和频率跳变，直流偏移和噪声，被认为是实验测试这些锁相环算法的动态性能。最后，提出了一种改进的跳频情况下HPLL正序列提取方法，以补偿非频率自适应DSC引起的稳态误差，并取得了满意的性能。
The moving average filter (MAF) is widely utilized to improve the disturbance rejection capability of phase-locked loops (PLLs). This is of vital significance for the grid-integration and stable operation of power electronic converters to electric power systems. However, the open-loop bandwidth is drastically reduced after incorporating a MAF into the PLL structure, which makes the dynamic response sluggish. To overcome this shortcoming, some new techniques have recently been proposed to improve the transient response of MAF-based PLLs. In this paper, a comprehensive performance comparison of advanced MAF-based PLL algorithms is presented. This comparison includes HPLL, MPLC-PLL, QT1-PLL, and DMAF-PLL. Various disturbances, such as grid voltage sag, voltage flicker, harmonics distortion, phase-angle and frequency jumps, DC offsets and noise, are considered to experimentally test the dynamic performances of these PLL algorithms. Finally, an improved positive sequence extraction method for a HPLL under the frequency jumps scenario is presented to compensate for the steady-state error caused by non-frequency adaptive DSC, and a satisfactory performance has been achieved.