Fast and accurate power estimation for application-specific instruction set processors using FPGA emulation
Fast and accurate power estimation for application-specific instruction set processors using FPGA emulation
复制标题
使用 FPGA 仿真对特定于应用的指令集处理器进行快速、准确的功耗估算
DOI：
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发表时间：
2015
期刊：
影响因子：
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通讯作者：
H. Blume
中科院分区：
文献类型：
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作者：
Sebastian Hesselbarth;Gregor Schewior;H. Blume
本文提出了一种用于Cadence Tensilica Xtensa LX5 ASIP的FPGA加速功率估计方法。基于混合功能级（FLPA）和指令级功率分析（ILPA），该模型可以与功能仿真一起映射到FPGA上。这可以在早期设计阶段快速准确地估计特定应用的功耗和每个任务的能量，这对于指令集扩展的功耗感知设计至关重要。该方法允许硬件和软件设计人员优化其实现以提高能效。描述了ASIP的方法和FPGA实现的考虑因素，并针对不同基准的GTL功率模拟进行了验证。结果得出的%MAE小于7.0%，NRMSE小于6.9%。最后，在真实图像尺寸上评估交通标志检测的指令集扩展。结果表明，性能提高了11.2倍，同时所需能量降低了10.5倍。
This paper presents an FPGA accelerated power estimation methodology for a Cadence Tensilica Xtensa LX5 ASIP. Based on hybrid functional level (FLPA) and instruction level power analysis (ILPA), the model can be mapped onto an FPGA together with the functional emulation. This enables fast and accurate estimation of application-specific power consumption and energy per task at early design stages which is crucial for power-aware design of instruction set extensions. The approach allows both hardware and software designers to optimize their implementations for power efficiency. The methodology for the ASIP and considerations for FPGA implementation are described and validated against GTL power simulation on different benchmarks. Results yield a %MAE of less than 7.0% and NRMSE of less than 6.9%. Finally, instruction set extensions for traffic sign detection are evaluated on real-world image sizes. It is shown that performance is improved by 11.2x while still reducing required energy by 10.5x.