1-nm-thick EOT high mobility Ge n- and p-MOSFETs with ultrathin GeOx/Ge MOS interfaces fabricated by plasma post oxidation
1-nm-thick EOT high mobility Ge n- and p-MOSFETs with ultrathin GeOx/Ge MOS interfaces fabricated by plasma post oxidation
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DOI：
10.1109/iedm.2011.6131630
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发表时间：
2011-12
期刊：
影响因子：
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通讯作者：
Rui Zhang;N. Taoka;Po-Chin Huang;M. Takenaka;S. Takagi
中科院分区：
文献类型：
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作者：
Rui Zhang;N. Taoka;Po-Chin Huang;M. Takenaka;S. Takagi
采用等离子体后氧化工艺制备了具有良好上级GeOx/Ge MOS界面的SOI EOT Al 2 O3/GeOx/Ge栅叠层。系统地研究了超薄GeOx/Ge MOS界面的特性，发现GeOx/Ge界面处的Dit与GeOx厚度之间存在着普遍的关系，0.5 nm厚的GeOx（0.35 nm EOT）足以抑制Dit。在（100）、（110）和（111）Ge衬底上制备了采用Al 2 O3/GeOx/Ge栅叠层的Ge n-和p-MOSFET。首次实现了具有亚nm EOT的高迁移率Ge n-MOSFET，在EOT为1.14和0.98 nm处的迁移率分别为937和691 cm 2/Vs。研究发现，对Dit的充分抑制使我们即使在亚纳米EOT范围内也能获得高峰迁移率，而仍需要进一步改善表面粗糙度并抑制剩余库仑散射中心（例如固定电荷和慢陷阱）的密度。进一步增强Gem和p-MOSFET的性能。
An ultrathin EOT Al2O3/GeOx/Ge gate stack with a superior GeOx/Ge MOS interface has been fabricated with a plasma post oxidation method. The properties of the ultra thin GeOx/Ge MOS interfaces are examined systemically, and it is revealed that there is a universal relationship between the Dit at GeOx/Ge interface and the GeOx thickness, and a 0.5-nm-thick GeOx (0.35 nm EOT) is sufficient to suppress the Dit. The Ge n- and p-MOSFETs using the Al2O3/GeOx/Ge gate stacks are fabricated on (100), (110) and (111) Ge. High mobility Ge n-MOSFETs with sub-nm EOT have been realized for the first time with record high mobilities of 937 and 691 cm2/Vs at EOT of 1.14 and 0.98 nm. It is found that the sufficient suppression of Dit allows us to obtain high peak mobilities even in sub-nm EOT range, while further improvements in surface roughness and suppression of the density of remaining Coulomb scattering centers such as fixed charges and slow traps are still needed to further enhance the performances of Ge n- and p-MOSFETs.