Synchronization circuit performance
Synchronization circuit performance
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DOI：
10.1109/4.982426
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发表时间：
2002-08
期刊：
影响因子：
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通讯作者：
D. Kinniment;A. Bystrov;A. Yakovlev
中科院分区：
文献类型：
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作者：
D. Kinniment;A. Bystrov;A. Yakovlev
同步电路通常的特征是它们在两个独立定时区域之间传输数据时的故障率。给出了失败（MTBF）之间的平均时间。可以通过扩展现有理论来考虑初始偏移来解释这些效果，我们提出了一种新的，更准确的公式。同步性能取决于达到同步的高可靠性，并在短时间内同步。我们表明，常用电路（例如JAMB闩锁）不会为非常高的可靠性应用产生最佳的折衷方案，并且可以设计出更好的电路。为了确认热噪声不影响MTBF对同步时间关系，我们设计了一个实验来测量集成的CMOS双态电路中的噪声。我们表明噪声显示出高斯分布，并且接近热搅拌预期的值。
Synchronizer circuits are usually characterized by their rate of failure in transmitting data between two independently timed regions. The mean time between failures (MTBF) is given. These effects can be explained by extending the existing theory to take account of initial offsets, and we propose a new, more accurate, formula. Synchronizer performance depends on achieving a high reliability of synchronization together with a short time. We show that commonly used circuits, such as the jamb latch, do not produce the best compromise for very high reliability applications, and that a better circuit can be designed. In order to confirm that thermal noise does not influence the MTBF against synchronization-time relationship, we have devised an experiment to measure noise in an integrated CMOS bistable circuit. We show that the noise exhibits a Gaussian distribution, and is close to the value expected from thermal agitation.