15.6 12b 250MS/S pipelined ADC with virtual ground reference buffers
15.6 12b 250MS/S pipelined ADC with virtual ground reference buffers
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15.6 具有虚拟接地参考缓冲器的 12b 250MS/S 流水线 ADC
DOI：
10.1109/isscc.2015.7063036
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发表时间：
2015
期刊：
影响因子：
--
通讯作者：
Hae
中科院分区：
文献类型：
--
作者：
H. Boo;D. Boning;Hae
开关电容流水线ADC中的高性能运算放大器需要消耗高功耗才能满足精度和速度要求。这是加剧了本征晶体管增益和电压余量在纳米级CMOS的下降。流水线ADC的发展采取了许多独特的方向来解决这些问题。非线性的数字校准使低性能运算放大器的使用成为可能。非基于运算放大器的方法，如基于过零的电路（ZCBC），脉冲桶旅（PBB）和环形放大器（RA），也已被探索。本文提出了一种虚地基准电压缓冲器方法，可显著降低运算放大器的关键性能指标，包括单位增益带宽、噪声和开环增益。由于允许运算放大器完全建立，因此无需进行校准以消除PBB和低增益或非建立运算放大器电路中的电荷转移误差。此外，还避免了ZCBC和基于非稳定运算放大器的电路中的开关和基准电压缓冲器两端的瞬态电流和相应的电压降。该电路还示出了实现比替代方法更高的最大操作速度。
High-performance op-amps in a switched-capacitor pipelined ADC consume high power to meet accuracy and speed requirements. This is aggravated by the decrease in intrinsic transistor gain and voltage headroom in nanoscale CMOS. Developments in pipelined ADCs have taken many unique directions to address these issues. Digital calibration of nonlinearity has enabled the use of low-performance op-amps. Non-op-amp-based approaches, such as zero-crossing-based circuits (ZCBC), the pulsed bucket brigade (PBB), and the ring amplifier (RA), have also been explored. This work presents a virtual ground reference buffer approach to significantly relax key op-amp specifications including unity-gain bandwidth, noise, and open-loop gain. Since the op-amp is allowed to settle fully, calibration to remove charge-transfer error in PBB and low gain or non-settling op-amp-based circuits is unnecessary. Also the transient current and corresponding voltage drop across switches and reference buffers in the ZCBCs and in non-settling op-amp-based circuits are avoided. The circuit is also shown to achieve higher maximum operating speed than alternative methods.