WB-Trees: A Meshed Tree Representation for FinFET Analog Layout Designs*
WB-Trees: A Meshed Tree Representation for FinFET Analog Layout Designs*
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DOI：
10.1145/3195970.3196137
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发表时间：
2018-06
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影响因子：
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通讯作者：
Yu-Sheng Lu;Yu-Hsuan Chang;Yao-Wen Chang
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文献类型：
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作者：
Yu-Sheng Lu;Yu-Hsuan Chang;Yao-Wen Chang
FinFET技术的新兴设计要求，沿着传统的几何约束，使得基于FinFET的模拟布局更具挑战性。以前的工作只能处理部分FinFET引起的设计约束，因为一些新的约束是本质上不同于传统的，因此，直接扩展以前的方法来处理FinFET引起的约束会导致解决方案质量下降和运行时开销。为了弥补这些缺点，我们提出了一个新的混合图形（网状树）表示的窗口网格和CB树（即WB树）和一个新的布局流程，有效和高效的计划，同时处理基于FinFET的设计约束和传统的。基于工业设计与各种约束的实验结果表明，我们的放置优于已发表的作品在解决方案的质量和运行时间。
The emerging design requirements with the FinFET technology, along with traditional geometrical constraints, make the FinFET-based analog placement even more challenging. Previous works can handle only partial FinFET-induced design constraints because some new constraints are intrinsically different from the traditional ones; as a result, directly extending previous methods to handle FinFET-induced constraints would incur solution quality degradation and runtime overhead. To remedy these disadvantages, we present a new hybrid graph (meshed tree) representation of a window mesh and CB-trees (namely, WB-trees) and a new placement flow with effective and efficient schemes to simultaneously handle FinFET-based design constraints and traditional ones. Experimental results based on industrial designs with various constraints show that our placer outperforms published works in both solution quality and runtime.