A 2–11 GHz 7-Bit High-Linearity Phase Rotator Based on Wideband Injection-Locking Multi-Phase Generation for High-Speed Serial Links in 28-nm CMOS FDSOI
A 2–11 GHz 7-Bit High-Linearity Phase Rotator Based on Wideband Injection-Locking Multi-Phase Generation for High-Speed Serial Links in 28-nm CMOS FDSOI
复制标题
基于宽带注入锁定多相生成的 2–11 GHz 7 位高线性相位旋转器，用于 28 nm CMOS FDSOI 中的高速串行链路
DOI：
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发表时间：
2017
影响因子：
5.4
通讯作者：
A. Mazzanti
中科院分区：
文献类型：
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作者：
E. Monaco;G. Anzalone;G. Albasini;S. Erba;M. Bassi;A. Mazzanti
在互联网流量需求不断增长的推动下，高速串行接口预计在不久的将来将达到400 Gb/s的聚合数据速率。在接收器（RX）侧，相位旋转器（PR）是将本地时钟的相位与传入数据的跳变对准并在最佳位置对眼进行采样的关键块。小相位阶跃和高线性度对于保持水平时间裕度至关重要，在25 Gb/s及更高时，通过减少符号持续时间来收紧水平时间裕度。$pi $ /4间隔信号的内插是在高分辨率下改善线性度的可行方法，只要具有低相位误差的多相位信号可用。提出了一种具有混合模拟和数字校准环路的注入锁定环形振荡器（ILRO），用于在宽频率范围内产生高精度的多相信号，并且能够抵抗大的电压和温度变化。基于两个无源混频器的相位检测器（PD）测量正交误差并连续调谐振荡器以实现低相位误差。同时，窗口比较器监测PD输出并在后台驱动数字粗校准。两个测试芯片已在28纳米CMOS完全耗尽绝缘体上硅技术制造。独立ILRO的频率范围为0.2-11.7 GHz，在±20%电源和−40 °C至+120 °C温度变化范围内，正交相位误差优于1.5°。功耗可从3 mW扩展到15 mW。当ILRO驱动7位PR时，它在2-11 GHz频率范围内的微分和积分非线性分别在0.5和1.1 LSB内，最大功耗为18.6 mW。实测性能与最新技术水平相比毫不逊色，并满足>25 Gb/s多标准I/O RX的要求。
Pushed by the ever-increasing demand of internet traffic, high-speed serial interfaces are expected to reach 400-Gb/s aggregate data rates in near future. At receiver (RX) side, phase rotators (PRs) are key blocks to align the phase of the local clock to the transitions of the incoming data and to sample the eye in the optimal position. Small phase step and high linearity are paramount in preserving the horizontal time margin, tightened by the reduced symbol duration at 25 Gb/s and beyond. Interpolation of $pi $ /4-spaced signals is a viable means of improving linearity at high resolution, provided multi-phase signals with low phase error are available. An injection-locked ring oscillator (ILRO) with a mixed analog and digital calibration loop is proposed for high accuracy multi-phase generation over a wide frequency range and against large voltage and temperature variations. A phase detector (PD) based on two passive mixers measures the quadrature error and continuously tunes the oscillator to achieve low phase error. Concurrently, a window comparator monitors the PD output and drives digital coarse calibration in background. Two test chips have been fabricated in 28-nm CMOS fully depleted silicon on insulator technology. The stand-alone ILRO demonstrates 0.2–11.7 GHz frequency range with better than 1.5° quadrature phase error over ±20% supply and −40 °C to +120 °C temperature variations. Power consumption is scalable from 3 to 15 mW. When the ILRO drives the 7-bit PR, it demonstrates differential and integral non-linearity within 0.5 and 1.1 LSB, respectively, across the 2–11 GHz frequency range with 18.6-mW maximum power dissipation. Measured performances compare favorably against the state of the art and meet the requirements of >25 Gb/s multi-standard I/O RXs.