The PCIe-based readout system for the LHCb experiment
The PCIe-based readout system for the LHCb experiment
复制标题
用于 LHCb 实验的基于 PCIe 的读出系统
DOI：
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发表时间：
2016
期刊：
影响因子：
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通讯作者：
F. Rethore
中科院分区：
文献类型：
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作者：
J. Cachemiche;P. Duval;F. Hachon;R. Gac;F. Rethore
LHCb实验旨在研究粒子和反粒子之间的差异，以及大型强子对撞机美丽和魅力部分非常罕见的衰变。探测器将在2019年进行升级，以通过取消第一级硬件触发来显著提高其效率。升级实验将实现一个无触发读出系统，在该系统中，来自每个大型强子对撞机束流交叉的所有数据都通过12000条光链路传输到计算农场，而不需要硬件过滤。赛事建设和赛事选拔完全在场内进行。该系统的另一个原始特征是，通过这些光纤传输的数据通过一种名为PCIe40的特殊设计的PCIe卡直接到达计算机。同一块板处理数据采集流程，并将快控制和慢控制分配给探测器前端电子设备。它嵌入了目前市场上最强大的现场可编程门阵列之一，拥有120万个逻辑单元。该板卡的输入和输出带宽分别为480Gbit/S和100Gbit/S。我们将介绍数据如何在电路板和PC服务器中循环，以实现活动建筑。我们将重点讨论这种带有非常大的FPGA的电路板的设计，特别是电源尺寸和热模拟方面的具体问题。我们将详细介绍主板的功能，最后我们将提供第一批性能测量结果。
The LHCb experiment is designed to study differences between particles and anti-particles as well as very rare decays in the beauty and charm sector at the LHC. The detector will be upgraded in 2019 in order to significantly increase its efficiency, by removing the first-level hardware trigger. The upgrade experiment will implement a trigger-less readout system in which all the data from every LHC bunch-crossing are transported to the computing farm over 12000 optical links without hardware filtering. The event building and event selection are carried out entirely in the farm. Another original feature of the system is that data transmitted through these fibres arrive directly to computers through a specially designed PCIe card called PCIe40. The same board handles the data acquisition flow and the distribution of fast and slow controls to the detector front-end electronics. It embeds one of the most powerful FPGAs currently available on the market with 1.2 million logic cells. The board has a bandwidth of 480 Gbits/s in both input and output over optical links and 100 Gbits/s over the PCI Express bus to the CPU. We will present how data circulate through the board and in the PC server for achieving the event building. We will focus on specific issues regarding the design of such a board with a very large FPGA, in particular in terms of power supply dimensioning and thermal simulations. The features of the board will be detailed and we will finally present the first performance measurements.