Abstraction techniques to improve scalability of equivalence verification for NCL circuits
Abstraction techniques to improve scalability of equivalence verification for NCL circuits
复制标题
提高 NCL 电路等效验证可扩展性的抽象技术
DOI:
10.1049/el.2016.1138
复制
发表时间:
2016
影响因子:
1.1
通讯作者:
S. Smith
中科院分区:
文献类型:
--
作者:
Vidura Wijayasekara;A. T. Rollie;R. G. Hodges;S. Srinivasan;S. Smith
Asynchronous NULL convention logic (NCL) circuits are dual-rail quasi-delay-insensitive circuits that have many applications in high radiation and extreme temperature fluctuation environments such as space exploration. Two abstraction techniques are proposed that can be used to drastically improve the efficiency and scalability of formal equivalence verification targeted at NCL circuits. The effectiveness of the abstraction techniques have been demonstrated using a number of multiply and accumulate circuit benchmarks.