Realization of quaternary logic circuits by n-channel MOS devices
Realization of quaternary logic circuits by n-channel MOS devices
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n沟道MOS器件实现四进制逻辑电路
DOI：
10.1109/jssc.1986.1052493
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发表时间：
1986
影响因子：
5.4
通讯作者：
A. Yoshida
中科院分区：
文献类型：
--
作者：
Y. Yasuda;Y. Tokuda;S. Zaima;K. Pak;T. Nakamura;A. Yoshida
提出了一种使用NMOS器件实现四进制电路的方法。作者设计了一种简化的逆变器基本形式，并实现了一系列基本逻辑和存储电路。这些电路包括具有三个增强模式阈值电压和一个耗尽模式阈值电压的MOS晶体管。这些电路的特点是MOS晶体管数量少、结构简单、传输特性准确。一些基本电路，例如反相器、NAND、NOR 和 Delta Lite，已经通过传统的 NMOS 技术制造出来。考虑到一些反向偏置效应，测量结果和计算结果之间的比较显示出良好的一致性。还讨论了逆变器的性能，包括速度、噪声容限和图案面积。
A method to implement quaternary circuits using NMOS devices is proposed. The authors have designed a simplified elementary form of inverter and have implemented a series of fundamental logic and memory circuits. These circuits comprise MOS transistors with three values of enhancement-mode threshold voltage and one depletion-mode threshold voltage. The features of these circuits are a small number of MOS transistors, a simple structure, and an exact transfer characteristic. Several fundamental circuits such as inverter, NAND, NOR, and delta literal have been fabricated by conventional NMOS technology. Comparisons between the measured and calculated results indicate a good agreement, taking into account some back-bias effect. The performance of the inverter, including speed, noise margin, and pattern area, is also discussed.