LDPC coded modulation for TLC flash memory
LDPC coded modulation for TLC flash memory
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DOI：
10.1109/itw.2017.8278036
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发表时间：
2017-11
期刊：
影响因子：
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通讯作者：
Huang-Chang Lee;Jieng-Heng Shy;Yen-ming Chen;Yeong-Luh Ueng
中科院分区：
文献类型：
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作者：
Huang-Chang Lee;Jieng-Heng Shy;Yen-ming Chen;Yeong-Luh Ueng
针对三电平单元（TLC）NAND Flash存储信号，提出了一种基于极稀疏低密度奇偶校验（LDPC）码的编码调制方案，利用极稀疏码图的优势，大大降低了编码和解码的复杂度。为了提高译码器的性能，引入迭代检测译码（IDD）从符号检测器中提取外信息，并设计了协作非Gray映射。此外，为了降低错误平层，插入交织器以确保级联的2度变量节点被分离到各个符号。仿真结果表明，所提出的编码调制方案可以提供一个实际的错误平层性能与低解码复杂度。
In this paper, a coded modulation scheme using extremely sparse low-density parity-check (LDPC) codes is proposed for the stored signal of triple-level-cell (TLC) NAND flash, where both the encoding and the decoding complexity can be significantly reduced with the advantage of the extremely sparse code graph. In order to enhance the performance of decoder, iterative detection decoding (IDD) is introduced to extract the extrinsic information from the symbol detector, and the cooperative non-Gray mapping is also designed. In addition, for error floor lowering, an interleaver is inserted to ensure the cascaded degree-2 variable nodes are separated to individual symbols. The simulation results show that the proposed coded modulation scheme can provide a practical error floor performance with a low decoding complexity.