Design and operation of a pulse-number multiplier for a high-precision RSFQ D/A converter
Design and operation of a pulse-number multiplier for a high-precision RSFQ D/A converter
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高精度RSFQ D/A转换器的脉冲数乘法器的设计和操作
DOI：
10.1109/tasc.2005.849827
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发表时间：
2005
影响因子：
1.8
通讯作者：
M. Ochiai
中科院分区：
文献类型：
--
作者：
M. Suzuki;M. Maezawa;F. Hirayama;M. Ochiai
脉冲数乘法器（PNM）是我们用于计量应用的快速单通量量子数模转换器的主要子系统。PNM电路从精确的低频时钟信号的输入生成高速脉冲串。我们设计，制作，并成功地测试了PNM测试电路。在1.6kA/cm/sup 2/ Nb三层工艺上，利用我们的标准单元库实现了PNM测试电路。低速测试证实了全功能运行。实验偏置裕度宽于/spl plusmn/20%，这些结果与模拟一致。我们还测试了电路的平均电压测量估计输出脉冲序列的频率。平均电压测量结果表明，PNM电路的输出频率在5 ~ 17 GHz范围内可调。PNM电路的误码率（BER）进行了测量，和外推的误差函数拟合建议在最佳偏置点的一个足够小的BER。
A pulse-number multiplier (PNM) is a principal subsystem of our rapid single flux quantum digital-to-analog converter for metrology applications. The PNM circuit generates a high-speed pulse train from an input of a precise low-frequency clock signal. We designed, fabricated, and successfully tested a PNM test circuit. The PNM test circuit was implemented by using our standard cell library on 1.6 kA/cm/sup 2/ Nb trilayer technology. Fully functional operation was confirmed by low-speed testing. Experimental bias margins were wider than /spl plusmn/20%, and these results agreed with a simulation. We also tested the circuit by average-voltage measurements for estimating the frequencies of output pulse trains. Results of average-voltage measurements implied that the output frequency of the PNM circuit was tunable from 5 GHz to 17 GHz. The bit error rate (BER) of the PNM circuit was measured, and extrapolation of the error-function fits suggested a sufficiently small BER at the optimum bias point.