On statistical correlation based path selection for timing validation
On statistical correlation based path selection for timing validation
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DOI：
10.1109/vdat.2005.1500006
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发表时间：
2005-04
期刊：
影响因子：
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通讯作者：
Kai Yang;Li-C. Wang;K. Cheng;S. Kundu
中科院分区：
文献类型：
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作者：
Kai Yang;Li-C. Wang;K. Cheng;S. Kundu
本文提出了一种基于统计定时模型的路径选择方法。我们的贡献是双重的：（1）与以前在统计路径选择方面的工作不同（Liou等人，2002），其中使用模式独立静态方法分析路径集质量，这项工作分析了从所选路径生成的模式的质量。(2)与以前的作品中的定时模型被假定为100%准确不同，我们的路径选择策略旨在容忍不准确的定时模型。为了实现基于模式的分析，我们开发了一个有效的时序模拟器，可以模拟两个芯片间和芯片内的工艺变化。为了实现定时模型的容错，我们引入了通用代表路径集（UR-Set）的概念。我们目前的实验结果来说明统计时序模拟器的使用，并证明我们的路径选择方法的基准电路的基础上的优越性。
This paper presents a path selection methodology based on statistical timing models. Our contributions are twofold: (1) Unlike previous works in statistical path selection (Liou et al., 2002) where path set quality was analyzed using a pattern-independent static approach, this work analyzes the quality of patterns generated from the selected paths. (2) Unlike in previous works where the timing model is assumed to be 100% accurate, our path selection strategy aims to tolerate inaccurate timing models. To achieve pattern-based analysis, we develop an efficient timing simulator that can model both inter-die and intra-die process variations. To accomplish error tolerance in timing models, we introduce the concept of universal representative path set (UR-Set). We present experimental results to illustrate the usage of the statistical timing simulator and to demonstrate the superiority of our path selection methodology based on benchmark circuits.