Automatic Synthesis of Static Fault Trees from System Models
Automatic Synthesis of Static Fault Trees from System Models
复制标题
从系统模型自动合成静态故障树
DOI：
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发表时间：
2011
期刊：
影响因子：
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通讯作者：
K. Tadano
中科院分区：
文献类型：
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作者：
Jianwen Xiang;Kazuo Yanoo;Y. Maeno;K. Tadano
故障树分析（FTA）是一种传统的可靠性分析技术。在实践中，故障树的手动开发可能是昂贵的和容易出错的，特别是在容错系统的情况下，由于固有的复杂性，如各种依赖性和组件之间的相互作用。提出了一些动态故障树门，如功能依赖门（FDEP）和优先级与门（PAND），分别对功能依赖和顺序依赖进行建模。不幸的是，这些门的潜在语义问题和局限性以前没有得到很好的研究。在本文中，我们描述了一个框架，自动生成静态故障树指定的SysML系统模型。提出了可靠性配置模型（RCM）和静态故障树模型（SFTM），分别嵌入了可靠性分析所需的系统配置信息和故障树生成所需的错误机制。在SFTM中，提出了用标准布尔AND和OR门静态表示函数依赖和顺序依赖，避免了动态FDEP和PAND门的问题，降低了基于组合模型的分析成本。一个容错并行处理器（FTTP）的例子来证明我们的方法。
Fault tree analysis (FTA) is a traditional reliability analysis technique. In practice, the manual development of fault trees could be costly and error-prone, especially in the case of fault tolerant systems due to the inherent complexities such as various dependencies and interactions among components. Some dynamic fault tree gates, such as Functional Dependency (FDEP) and Priority AND (PAND), are proposed to model the functional and sequential dependencies, respectively. Unfortunately, the potential semantic troubles and limitations of these gates have not been well studied before. In this paper, we describe a framework to automatically generate static fault trees from system models specified with SysML. A reliability configuration model (RCM) and a static fault tree model (SFTM) are proposed to embed system configuration information needed for reliability analysis and error mechanism for fault tree generation, respectively. In the SFTM, the static representations of functional and sequential dependencies with standard Boolean AND and OR gates are proposed, which can avoid the problems of the dynamic FDEP and PAND gates and can reduce the cost of analysis based on a combinatorial model. A fault-tolerant parallel processor (FTTP) example is used to demonstrate our approach.