Design methodologies for high-performance noise-tolerant XOR-XNOR circuits
Design methodologies for high-performance noise-tolerant XOR-XNOR circuits
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DOI：
10.1109/tcsi.2005.860119
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发表时间：
2006-04
期刊：
影响因子：
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通讯作者：
S. Goel;M. Elgamel;M. Bayoumi;Y. Hanafy
中科院分区：
文献类型：
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作者：
S. Goel;M. Elgamel;M. Bayoumi;Y. Hanafy
缩小到深亚微米 (DSM) 技术使噪声成为与功率、速度和面积同等重要的指标。 DSM 电路具有更小的特征尺寸、更低的电源电压和更高的频率，这些特征使其更容易受到噪声的影响。为了在存在噪声的情况下实现鲁棒性，需要新的设计和电路技术。提出了设计高能效抗噪声异或异或非电路的新方法，该电路可以在低电源电压下工作，具有良好的信号完整性和驱动能力。在应用所提出的方法之后，对所设计的电路进行了表征，并与之前发布的电路进行了可靠性、速度和能效方面的比较。为了测试所提出电路的驱动能力，它们被嵌入到现有的 5-2 压缩机设计中。平均噪声阈值能量（ANTE）用于量化所提出电路的抗噪声能力。仿真结果表明，与文献中现有的最佳电路相比，所提出的电路具有更好的抗噪性、更低的功率延迟积（PDP）和良好的驱动能力。所有提出的电路都被证明速度更快，并且在从 3.3V 到 0.6V 的所有电源电压范围内都能成功工作。对于给定的电源电压范围，PDP 的节省范围分别为 94% 到 21%，ANTE 的平均改进为 2.67 倍。
Scaling down to deep submicrometer (DSM) technology has made noise a metric of equal importance as compared to power, speed, and area. Smaller feature size, lower supply voltage, and higher frequency are some of the characteristics for DSM circuits that make them more vulnerable to noise. New designs and circuit techniques are required in order to achieve robustness in presence of noise. Novel methodologies for designing energy-efficient noise-tolerant exclusive-OR-exclusive- NOR circuits that can operate at low-supply voltages with good signal integrity and driving capability are proposed. The circuits designed, after applying the proposed methodologies, are characterized and compared with previously published circuits for reliability, speed and energy efficiency. To test the driving capability of the proposed circuits, they are embedded in an existing 5-2 compressor design. The average noise threshold energy (ANTE) is used for quantifying the noise immunity of the proposed circuits. Simulation results show that, compared with the best available circuit in literature, the proposed circuits exhibit better noise-immunity, lower power-delay product (PDP) and good driving capability. All of the proposed circuits prove to be faster and successfully work at all ranges of supply voltage starting from 3.3 V down to 0.6 V. The savings in the PDP range from 94% to 21% for the given supply voltage range respectively and the average improvement in the ANTE is 2.67X.