Thermal-uniformity-aware X-filling to reduce temperature-induced delay variation for accurate at-speed testing

Thermal-uniformity-aware X-filling to reduce temperature-induced delay variation for accurate at-speed testing
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DOI:
10.1109/vts.2010.5469578
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发表时间:
2010-04
期刊:
2010 28th VLSI Test Symposium (VTS)
影响因子:
--
通讯作者:
T. Yoneda;M. Inoue;Yasuo Sato;H. Fujiwara
T. Yoneda;M. Inoue;Yasuo Sato;H. Fujiwara
中科院分区:
其他
文献类型:
--
作者:
T. Yoneda;M. Inoue;Yasuo Sato;H. Fujiwara

文献摘要

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众所周知,测试模式的功耗超过功能模式,在电路内的分布并不均匀。空间功率分布的不均匀性可能导致电路内部局部发热和温差。由于栅极延迟取决于结温,电路内的温差可能导致在高速测试中错误通过或失败。本文首先讨论了空间热均匀性对高质量和精确的高速测试的重要性。本文还介绍了一种x填充技术,该技术可以最大限度地减少电路内的空间温度变化,同时保持低水平的整体电路功耗。实验结果表明,与现有的x填充技术相比,该方法是有效的。
It is well known that the test mode exceeds the functional mode in power consumption, which is not uniformly distributed within the circuit. The non-uniformity in spatial power distribution may cause localized heating and temperature differences within the circuit. Since gate delay depends on junction temperature, thermal differences within the circuit may lead to erroneous pass or fail in at-speed testing. This paper first discusses the importance of spatial thermal uniformity for high quality and accurate at-speed testing. The paper also presents an X-filling technique that minimizes the spatial temperature variation within the circuit while preserving the overall circuit power consumption at low level. Experimental results show the effectiveness of the proposed method compared to the existing X-filling techniques.