Thermal-uniformity-aware X-filling to reduce temperature-induced delay variation for accurate at-speed testing
Thermal-uniformity-aware X-filling to reduce temperature-induced delay variation for accurate at-speed testing
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DOI:
10.1109/vts.2010.5469578
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发表时间:
2010-04
期刊:
影响因子:
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通讯作者:
T. Yoneda;M. Inoue;Yasuo Sato;H. Fujiwara
中科院分区:
文献类型:
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作者:
T. Yoneda;M. Inoue;Yasuo Sato;H. Fujiwara
It is well known that the test mode exceeds the functional mode in power consumption, which is not uniformly distributed within the circuit. The non-uniformity in spatial power distribution may cause localized heating and temperature differences within the circuit. Since gate delay depends on junction temperature, thermal differences within the circuit may lead to erroneous pass or fail in at-speed testing. This paper first discusses the importance of spatial thermal uniformity for high quality and accurate at-speed testing. The paper also presents an X-filling technique that minimizes the spatial temperature variation within the circuit while preserving the overall circuit power consumption at low level. Experimental results show the effectiveness of the proposed method compared to the existing X-filling techniques.