Ultra-low specific on-resistance SOI double-gate trench-type MOSFET
Ultra-low specific on-resistance SOI double-gate trench-type MOSFET
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DOI：
10.1088/1674-4926/32/10/104004
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发表时间：
2011-10
影响因子：
5.1
通讯作者：
Lei Tian-Fei;L. Xiaorong;Ge Rui;Chen Xi;Wang Yuangang;Yao Guoliang;Jiang Yongheng;Zhang Bo;L. Zhaoji
中科院分区：
文献类型：
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作者：
Lei Tian-Fei;L. Xiaorong;Ge Rui;Chen Xi;Wang Yuangang;Yao Guoliang;Jiang Yongheng;Zhang Bo;L. Zhaoji
提出了一种超低比导通电阻（Ron，sp）的SOI双栅沟槽型MOSFET（DG trench MOSFET）。MOSFET具有双栅极和氧化物沟槽：氧化物沟槽位于漂移区中，一个沟槽栅极插入氧化物沟槽中，一个沟槽栅极延伸到掩埋氧化物中。首先，双栅极通过形成双导电沟道来减小Ron，sp。其次，氧化物沟槽不仅折叠漂移区，而且调制电场，从而减小器件间距并增加击穿电压（BV）。半单元间距为3 μm的DG沟槽MOSFET的BV为93V，导通电阻为51.8m Ω·mm2。与单栅SOI MOSFET（SG MOSFET）和带氧化物沟槽的单栅SOI MOSFET（SG沟槽MOSFET）相比，DG沟槽MOSFET的导通电阻（Ron，sp）在相同BV下分别降低了63.3%和33.8%。
An ultra-low specific on-resistance ( R on,sp ) silicon-on-insulator (SOI) double-gate trench-type MOSFET (DG trench MOSFET) is proposed. The MOSFET features double gates and an oxide trench: the oxide trench is in the drift region, one trench gate is inset in the oxide trench and one trench gate is extended into the buried oxide. Firstly, the double gates reduce R on,sp by forming dual conduction channels. Secondly, the oxide trench not only folds the drift region, but also modulates the electric field, thereby reducing device pitch and increasing the breakdown voltage (BV). A BV of 93 V and a R on,sp of 51.8 mΩ·mm 2 is obtained for a DG trench MOSFET with a 3 μm half-cell pitch. Compared with a single-gate SOI MOSFET (SG MOSFET) and a single-gate SOI MOSFET with an oxide trench (SG trench MOSFET), the R on,sp of the DG trench MOSFET decreases by 63.3% and 33.8% at the same BV, respectively.