Connectivity and performance tradeoffs in the cascade correlation learning architecture
Connectivity and performance tradeoffs in the cascade correlation learning architecture
复制标题
级联相关学习架构中的连接性和性能权衡
DOI：
10.1109/72.329690
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发表时间：
1994
影响因子：
--
通讯作者：
I. Koren
中科院分区：
文献类型：
--
作者：
D. Phatak;I. Koren
级联相关是一种非常灵活、高效和快速的监督学习算法。它通过一次添加一个隐藏单元来增量地构建网络，直到实现所需的输入/输出映射。它将所有以前安装的单元连接到正在添加的新单元。因此，每个新单元实际上添加了一个新层，并且隐藏和输出单元的扇入随着更多单元的添加而不断增加。这样的结构很难在VLSI中实现，因为连接是不规则的，扇入是无界的。此外，通过所得网络的深度或传播延迟与单元的数量成正比，并且可能过大。我们修改了算法，通过控制连通性来生成具有受限扇入和小深度（传播延迟）的网络。我们的研究结果表明，连接性和其他性能属性，如深度，独立参数的总数和学习时间之间存在权衡。
The cascade correlation is a very flexible, efficient and fast algorithm for supervised learning. It incrementally builds the network by adding hidden units one at a time, until the desired input/output mapping is achieved. It connects all the previously installed units to the new unit being added. Consequently, each new unit in effect adds a new layer and the fan-in of the hidden and output units keeps on increasing as more units get added. The resulting structure could be hard to implement in VLSI, because the connections are irregular and the fan-in is unbounded. Moreover, the depth or the propagation delay through the resulting network is directly proportional to the number of units and can be excessive. We have modified the algorithm to generate networks with restricted fan-in and small depth (propagation delay) by controlling the connectivity. Our results reveal that there is a tradeoff between connectivity and other performance attributes like depth, total number of independent parameters, and learning time.