Error-correcting codes in computer arithmetic.
Error-correcting codes in computer arithmetic.
复制标题
计算机算术中的纠错码。
DOI:
10.1007/978-1-4615-9053-8_5
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发表时间:
1972
期刊:
影响因子:
--
通讯作者:
Oscar N. Garcia
中科院分区:
文献类型:
--
作者:
J. Massey;Oscar N. Garcia
This chapter is intended to summarize the most important results which have been obtained in the theory of coding for the correction and detection of errors in computer arithmetic. The rapid growth in the size and speed of digital computers has placed stringent reliability demands on the arithmetic unit. Attempts to satisfy these demands have generally followed one of three directions: (1) Attempts to improve the reliability of the components used in the construction of the arithmetic unit, (2) attempts to improve reliability by incorporating hardware redundancy so that the result of a computation is unaffected by the failure of one or more of the replicated units which form the arithmetic unit, or so that the failure of one or more of the replicated units can be detected and the faulty units replaced, and (3) attempts to incorporate redundancy into the numbers themselves which are being processed so that erroneous results can be corrected or detected. This third approach, which is the subject of this chapter, tacitly assumes that it is possible to build the “decoder” which corrects or detects erroneous results much more reliably than the arithmetic unit which it monitors, so that the decoder can be considered error-free for practical purposes.