Tinsel: A Manythread Overlay for FPGA Clusters
Tinsel: A Manythread Overlay for FPGA Clusters
复制标题
Tinsel：FPGA 集群的多线程叠加
DOI：
--
复制
发表时间：
2019
期刊：
影响因子：
--
通讯作者：
David B. Thomas
中科院分区：
文献类型：
--
作者：
Matthew Naylor;S. Moore;David B. Thomas
具有先进网络设施的商品FPGA板在构建可扩展的高性能计算集群方面具有巨大潜力。然而，低级设计工具和长时间的综合是应用程序开发人员生产力的主要障碍。在本文中，我们探讨了潜在的分布式软处理器覆盖，在软件编程的高层次的抽象，提供一个有用的性能水平的FPGA集群。特别是，我们演示了使用硬件多线程来实现快速，节省空间，高吞吐量的覆盖，并将其12-FPGA实例（12，288个RISC-V线程）与传统的Xeon集群在分布式图形处理问题上进行比较。
Commodity FPGA boards with advanced networking facilities have great potential in the construction of high-performance compute clusters that scale. However, low-level design tools and long synthesis times are major barriers to productivity for application developers. In this paper, we explore the potential of a distributed soft-processor overlay, programmed in software at a high-level of abstraction, to deliver a useful level of performance for FPGA clusters. In particular, we demonstrate the use of hardware multhreading to achieve a fast, space-efficient, high-throughput overlay, and compare a 12-FPGA instance of it (12,288 RISC-V threads) against a conventional Xeon cluster on the problem of distributed graph processing.