An Analog-Digital Merged Neural Circuit Using Pulse Width Modulation Technique
An Analog-Digital Merged Neural Circuit Using Pulse Width Modulation Technique
复制标题
采用脉宽调制技术的模数融合神经电路
DOI：
10.1023/a:1008338200493
复制
发表时间：
1999
影响因子：
1.4
通讯作者：
A. Iwata
中科院分区：
文献类型：
--
作者：
T. Morie;J. Funakoshi;M. Nagata;A. Iwata
本文提出了一种基于模数混合电路结构的PWM神经元电路。提出了一些新的PWM电路技术。本文介绍了一种双极加权求和电路，通过补偿寄生电容效应，在SPICE仿真中，该电路在5V电源电压下达到8位精度。文中还介绍了一种高性能的差分锁存比较器，在SPICE仿真中，该比较器在100 MHz时能分辨1 mV的差分。接下来，我们提出了一个原型芯片采用0.6 μm CMOS工艺制造。测量结果表明，加权求和和S形变换的总体精度为5位。利用原型芯片构建了一个神经网络，实现异或函数的实验结果成功地验证了基本的神经运算。
This paper presents a neural circuit using PWM technique based on an analog-digital merged circuit architecture. Some new PWM circuit techniques are proposed. A bipolar-weighted summation circuit is described which attains 8-bit precision in SPICE simulation at 5 V supply voltage by compensating parasitic capacitance effects. A high performance differential-type latch comparator which can discriminate 1 mV difference at 100 MHz in SPICE simulation is also described. Next, we present a prototype chip fabricated using a 0.6 μm CMOS process. The measurement results demonstrate that the overall precision in the weighted summation and the sigmoidal transformation is 5 bits. A neural network has been constructed using the prototype chips, and the experimental results for realizing the XOR function have successfully verified the basic neural operation.