Border-Trap Characterization for Ge Gate Stacks Using Deep-Level Transient Spectroscopy
Border-Trap Characterization for Ge Gate Stacks Using Deep-Level Transient Spectroscopy
复制标题
使用深能级瞬态光谱对 Ge 栅极堆栈进行边界陷阱表征
DOI:
10.1149/09204.0003ecst
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发表时间:
2019
期刊:
影响因子:
--
通讯作者:
Dong Wang
中科院分区:
文献类型:
--
作者:
Hiroshi Nakashima;Wei-Chen Wen;Keisuke Yamamoto;Dong Wang
A border trap (BT) evaluation method was established for SiO2/GeO2/Ge gate stacks by using deep-level transient spectroscopy with a lock-in integrator. Ge metal-oxidesemiconductor capacitors (MOSCAPs) with SiO2/GeO2/Ge gate stacks were fabricated by post-passivation thermal oxidation. The interface trap (IT) and BT signals were successfully separated based on their different dependences on the intensity of injection pulses. By using p-type MOSCAPs, BTs at the position of 0.4 nm from GeO2/Ge interface were measured. The energy of these BTs was centralized at the position near to the valence band edge of Ge, and the density (Nbt) was in the range of 1017-1018 cm− 3. For n-type MOSCAPs, BTs at the position range of 2.8-3.4 nm from the GeO2/Ge interface were measured. The energy of these BTs were distributed in a relatively wide range near to the conduction band edge of Ge, and the Nbt was approximately one order of magnitude higher than those for p-MOSCAPs. We also found that Al post metallization annealing can passivate both ITs and BTs near to the valence band edge of Ge but not those near to the conduction band edge.