Bridge over troubled wrappers:automated interface synthesis
Bridge over troubled wrappers:automated interface synthesis
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跨越有问题的包装器：自动化接口合成
DOI：
10.1109/icvd.2004.1260923
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发表时间：
2004
期刊：
影响因子：
--
通讯作者：
A. Sowmya
中科院分区：
文献类型：
--
作者：
V. D'Silva;S. Ramesh;A. Sowmya
片上系统（SoC）设计方法严重依赖于知识产权（IP）块的重用。IP重用是一个劳动密集型和耗时的过程，因为IP块通常具有不同的通信接口。我们提出了一种算法，可以自动生成不匹配的IP通信协议之间的接口的可证明正确的HDL描述。通过提供解决数据不匹配、流水线和时钟速度差异的解决方案，我们显著改进和扩展了现有的工作。这些想法已经实现，并且该工具已用于合成许多SoC协议的包装器和桥接。
System-on-Chip (SoC) design methodologies rely heavily on reuse of intellectual property (IP) blocks. IP reuse is a labour intensive and time consuming process as IP blocks often have different communication interfaces. We present an algorithm which automates the generation of provably correct HDL descriptions of interfaces between mismatched IP communication protocols. We significantly improve and extend existing work by providing a solution which addresses data mismatches, pipelining and differences in clock speeds. These ideas have been implemented and the tool has been used to synthesise wrappers and bridges for many SoC protocols.