Scalability of Hybrid SpMV on Intel Xeon Phi Knights Landing
Scalability of Hybrid SpMV on Intel Xeon Phi Knights Landing
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DOI：
10.1109/hpcs48598.2019.9188154
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发表时间：
2019-07
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影响因子：
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通讯作者：
Brian A. Page;P. Kogge
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文献类型：
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作者：
Brian A. Page;P. Kogge
SPMV是稀疏矩阵和密集向量的乘积，它象征着新的类别的应用程序带宽和通信的应用程序，而不是flop，驱动的。此类计算中的稀疏性和随机性会破坏性能，尤其是在强大而不是弱的情况下，试图进行缩放。在这项研究中，我们开发并评估了用于在Intel Xeon Phi骑士登陆（KNL）处理器群上对SPMV的压缩矢量化稀疏行（CVR）方法进行强缩放的混合实现。我们展示了我们的混合SPMV实施如何实现计算性能的提高，但并未以极大的规模解决主要的通信间接因素。在一系列矩阵特征上，评估了工作负载分布，数据放置和远程减少的问题。我们的结果表明，尽管计算性能提高，但迄今为止，作为$ p \ rightarrow \ infty $ communication开销是主要因素。
SpMV, the product of a sparse matrix and a dense vector, is emblematic of a new class of applications that are memory bandwidth and communication, not flop, driven. Sparsity and randomness in such computations play havoc with performance, especially when strong, instead of weak, scaling is attempted. In this study we develop and evaluate a hybrid implementation for strong scaling of the Compressed Vectorization-oriented sparse Row (CVR) approach to SpMV on a cluster of Intel Xeon Phi Knights Landing (KNL) processors. We show how our hybrid SpMV implementation achieves increased computational performance, yet does not address the dominant communication overhead factor at extreme scale. Issues with workload distribution, data placement, and remote reductions are assessed over a range of matrix characteristics. Our results indicate that as $P \rightarrow\infty$ communication overhead is by far the dominant factor despite improved computational performance.