Investigation on the implementation of stateful minority logic for future in-memory computing
Investigation on the implementation of stateful minority logic for future in-memory computing
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DOI：
10.1109/access.2021.3134687
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发表时间：
2021
期刊：
影响因子：
3.9
通讯作者：
Chunyang Liu;P. Ren;Bo Zhou;Jianfu Zhang;H. Fang;Zhigang Ji
中科院分区：
文献类型：
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作者：
Chunyang Liu;P. Ren;Bo Zhou;Jianfu Zhang;H. Fang;Zhigang Ji
内存计算是解决当前物联网和大数据时代传统冯·诺伊曼结构的延迟和功耗问题的最佳方法之一。由于其简单的结构，高集成和与CMOS技术的兼容性，因此对基于备忘录的内存计算的实现进行了广泛的研究。少数民族逻辑被认为是最适合实现计算函数的，并且也提出了基于实施少数民族逻辑的基本单元。但是，从我们的分析中，它对设备电气特征有要求。在制造了满足要求的阻力随机访问记忆（RRAM）设备之后，演示仍然无法实现。通过理论推导和模拟，抗性变化是结果错误的主要原因。此外，使用现有技术的高变异设备可以奇伦（Chanlleng）展示基本逻辑单元。
In-memory computing is one of the best ways to solve the delay and power consumption issues of traditional von Neumann structures in the current Internet of Things and big data era. The realization of in-memory computing based on memristors is being widely studied because of its simple structure, high integration, and compatibility with CMOS technology. Minority logic is considered as the most suitable to realize computation function, and the basic cell based on memristors to implementing minority logic has also been proposed. However, from our analysis, it has requirements on device electrical character. After fabricating resistance random access memory (RRAM) devices that meet requirements, demonstration still cannot achieve. Through theoretical derivation and simulation, resistance variation is the main reason for wrong results. Moreover, high variation devices with existing technology can be chanllenging to demonstrate the basic logic cell.