Compact Leakage-Free Support for Integrity and Reliability
Compact Leakage-Free Support for Integrity and Reliability
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DOI：
10.1109/isca45697.2020.00066
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发表时间：
2020-05
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通讯作者：
Meysam Taassori;R. Balasubramonian;Siddhartha Chhabra;Alaa R. Alameldeen;Manjula Peddireddy;R. Agarwal
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作者：
Meysam Taassori;R. Balasubramonian;Siddhartha Chhabra;Alaa R. Alameldeen;Manjula Peddireddy;R. Agarwal
内存系统容易受到许多安全漏洞的攻击，例如，攻击者可以通过破坏存储在内存中的值来干扰程序的执行。现代英特尔®软件防护扩展（SGX）系统已经支持完整性树来检测此类恶意行为。然而，尽管最近的创新，带宽开销的完整性+重放保护是不平凡的；最先进的解决方案，如Synergy，在内存密集型基准测试中平均降低速度为2.3倍。先前的工作还实现了一个由多个应用程序共享的树，从而引入了一个潜在的侧信道。在这项工作中，我们以Synergy和SGX基线为基础，并引入了三种新技术。首先，我们通过为每个应用程序实现单独的完整性树和元数据缓存来隔离每个应用程序；这提高了元数据缓存效率，性能提高了39%，同时消除了潜在的侧信道。其次，我们减少了元数据的占用空间。Synergy使用完整性和纠错元数据的组合，为两者提供低开销的支持。我们跨多个块共享纠错元数据，从而降低了其占用空间（减少了$16 \times$），同时仅在罕见的极端情况下防止纠错。然而，我们发现共享的纠错元数据，即使使用缓存，也不能提高性能。第三，我们观察到，由于纠错元数据占用空间较小，它可以嵌入到完整性树中。这减少了必须访问的元数据块，以支持完整性验证和芯片杀伤可靠性。与基线Synergy相比，所提出的具有嵌入式共享奇偶校验（ITESP）的隔离树的总体性能提高了64%。
The memory system is vulnerable to a number of security breaches, e.g., an attacker can interfere with program execution by disrupting values stored in memory. Modern Intel® Software Guard Extension (SGX) systems already support integrity trees to detect such malicious behavior. However, in spite of recent innovations, the bandwidth overhead of integrity+replay protection is non-trivial; state-of-the-art solutions like Synergy introduce average slowdowns of $2.3 \times$ for memory-intensive benchmarks. Prior work also implements a tree that is shared by multiple applications, thus introducing a potential side channel. In this work, we build on the Synergy and SGX baselines, and introduce three new techniques. First, we isolate each application by implementing a separate integrity tree and metadata cache for each application; this improves metadata cache efficiency and improves performance by 39%, while eliminating the potential side channel. Second, we reduce the footprint of the metadata. Synergy uses a combination of integrity and error correction metadata to provide low-overhead support for both. We share error correction metadata across multiple blocks, thus lowering its footprint (by $16 \times$) while preventing error correction only in rare corner cases. However, we discover that shared error correction metadata, even with caching, does not improve performance. Third, we observe that thanks to its lower footprint, the error correction metadata can be embedded into the integrity tree. This reduces the metadata blocks that must be accessed to support both integrity verification and chipkill reliability. The proposed Isolated Tree with Embedded Shared Parity (ITESP) yields an overall performance improvement of 64%, relative to baseline Synergy.